in verilog 8bit mips processor

.lso
ALU.prj
ALU.stx
ALU.v
ALU.xst
alu_test.v
alu_test_v.udo
ALU_vhdl.prj
CLA32.v
CLA4.v
cla_test.v
cla_test_v.udo
Control.v
control_test.v
control_test_v.udo
DataMem.prj
DataMem.stx
DataMem.v
DataMem.xst
DataMem_vhdl.prj
data_test.v
data_test_v.fdo
data_test_v.udo
EXPIPE_test.v
EXPIPE_test_v.fdo
EXPIPE_test_v.udo
EX_MEMpipe.v
fu.v
HDU.prj
HDU.stx
hdu.v
HDU.xst
HDU_vhdl.prj
IDPIPE_test.v
IDPIPE_test_v.udo
ID_EXpipe.v
IF_IDpipe.prj
IF_IDpipe.stx
IF_IDpipe.v
IF_IDpipe.xst
IF_IDpipe_vhdl.prj
MEMPIPE_test.v
MEMPIPE_test_v.udo
MEM_WBpipe.prj
MEM_WBpipe.stx
MEM_WBpipe.v
MEM_WBpipe.xst
MEM_WBpipe_vhdl.prj
MIPS.cmd_log
mips.ise
mips.ise_ISE_Backup
MIPS.lso
MIPS.ngr
MIPS.prj
mips.restore
MIPS.syr
MIPS.udo
MIPS.v
MIPS.xst
mips_ise9migration.zip
MIPS_vhdl.prj
mux.v
MUX_2to1.bld
MUX_2to1.chk
MUX_2to1.cxt
MUX_2to1.gyd
MUX_2to1.jed
MUX_2to1.log
MUX_2to1.mfd
MUX_2to1.nga
MUX_2to1.ngc
MUX_2to1.ngd
MUX_2to1.ngr
MUX_2to1.pad
MUX_2to1.pnx
MUX_2to1.prj
MUX_2to1.rpt
MUX_2to1.stx
MUX_2to1.tim
MUX_2to1.tspec
MUX_2to1.vm6
MUX_2to1.xml
MUX_2to1.xst
MUX_2to1_build.xml
MUX_2to1_pad.csv
MUX_2to1_vhdl.prj
PC.udo
PC.v
PC_test.v
PC_test_v.fdo
PC_test_v.udo
Registers.prj
Registers.stx
Registers.v
Registers.xst
Registers_vhdl.prj
reg_test.v
reg_test_v.fdo
reg_test_v.udo
tmperr.err

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