This file is consist of VHDL regarding PWM Driver

FoxBone_PWM1
............\hdl
............\...\PWMchannel.vhd
............\...\FoxBone_PWM1.vhd
............\package
............\constraint
............\..........\FoxBone_PWM1.pdc
............\viewdraw
............\........\vf
............\........\..\project.lst
............\........\sch
............\........\sym
............\........\wir
............\........\viewdraw.ini
............\smartgen
............\........\smartgen.aws
............\coreconsole
............\simulation
............\..........\run.do
............\..........\tb.log
............\..........\modelsim.log
............\..........\postsynth
............\..........\modelsim.ini
............\synthesis
............\.........\stdout.log
............\.........\syntmp.msg
............\.........\syntmp
............\.........\......\FoxBone_PWM1.plg
............\.........\......\FoxBone_PWM1.msg
............\.........\.recordref
............\.........\traplog.tlg
............\phy_synthesis
............\stimulus
............\........\FoxBone_PWM1.hpj
............\........\waveperl.log
............\........\BtimErrors.log
............\........\FoxBone_PWM1.dsk
............\........\PWMchannel.hpj
............\........\PWMchannel.dsk
............\........\FoxBone_PWM1_tbench.btim
............\........\FoxBone_PWM1_tbench.vhd
............\........\FoxBone_PWM1_tbench.bk
............\designer
............\........\impl1
............\........\.....\impl.prj_des
............\........\.....\FoxBone_PWM1.tcl
............\........\.....\designer_genhdl.log
............\........\.....\FoxBone_PWM1.ide_des
............\........\.....\FoxBone_PWM1.dtf
............\........\.....\................\verify.log
............\........\.....\FoxBone_PWM1.stp
............\........\.....\designer.log
............\........\.....\simulation
............\........\.....\FoxBone_PWM1.adb
............\FoxBone_PWM1.prj

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