I2C communication protocol of a verilog code, development environment is Quartus 2, produce the results shown in the digital control

ex9\EX9\verilogiic1121\cstate.jpg
...\...\..............\iic_com.v
...\...\..............\iic_top.asm.rpt
...\...\..............\iic_top.cdf
...\...\..............\iic_top.done
...\...\..............\iic_top.dpf
...\...\..............\iic_top.fit.rpt
...\...\..............\iic_top.fit.smsg
...\...\..............\iic_top.fit.summary
...\...\..............\iic_top.map.summary
...\...\..............\iic_top.pin
...\...\..............\iic_top.pof
...\...\..............\iic_top.qpf
...\...\..............\iic_top.qsf
...\...\..............\iic_top.tan.rpt
...\...\..............\iic_top.tan.summary
...\...\..............\iic_top.v
...\...\..............\iic_top.v.bak
...\...\..............\iic_top_assignment_defaults.qdf
...\...\..............\led_seg7.v
...\...\..............\tb_iic_top.vwf
...\...\..............\iic_top.map.rpt
...\...\..............\iic_top.flow.rpt
...\...\..............\iic_top.qws
...\...\..............\.ncremental_db\README
...\...\..............\..............\compiled_partitions\iic_top.root_partition.map.kpt
...\...\..............\db\iic_top_global_asgn_op.abo
...\...\..............\..\prev_cmp_iic_top.asm.qmsg
...\...\..............\..\prev_cmp_iic_top.fit.qmsg
...\...\..............\..\prev_cmp_iic_top.tan.qmsg
...\...\..............\..\wed.wsf
...\...\..............\..\iic_top.db_info
...\...\..............\..\logic_util_heursitic.dat
...\...\..............\..\iic_top.cbx.xml
...\...\..............\..\iic_top.hif
...\...\..............\..\iic_top.hier_info
...\...\..............\..\iic_top.smart_action.txt
...\...\..............\..\iic_top.map.qmsg
...\...\..............\..\iic_top.rtlv_sg.cdb
...\...\..............\..\iic_top.rtlv.hdb
...\...\..............\..\iic_top.rtlv_sg_swap.cdb
...\...\..............\..\iic_top.lpc.txt
...\...\..............\..\iic_top.lpc.html
...\...\..............\..\iic_top.lpc.rdb
...\...\..............\..\iic_top.pre_map.hdb
...\...\..............\..\iic_top.pre_map.cdb
...\...\..............\..\iic_top.ae.hdb
...\...\..............\..\iic_top.sld_design_entry_dsc.sci
...\...\..............\..\iic_top.cmp.rdb
...\...\..............\..\prev_cmp_iic_top.map.qmsg
...\...\..............\..\iic_top.rpp.qmsg
...\...\..............\..\iic_top.sgate.rvd
...\...\..............\..\iic_top.sgate_sm.rvd
...\...\..............\..\iic_top.tmw_info
...\...\..............\..\iic_top.sld_design_entry.sci
...\...\..............\..\iic_top.eco.cdb
...\...\..............\incremental_db\compiled_partitions
...\...\..............\incremental_db
...\...\..............\db
...\...\verilogiic1121
...\EX9
ex9

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