The VSPI core implements an SPI interface compatible with the many -- serial EEPROMs, and microcontrollers. The VSPI core is typically used -- as an SPI master, but it can be configured as an SPI slave as well.

pro3\pro3.bdf
....\db\pro3.cmp.rdb
....\..\pro3.syn_hier_info
....\..\pro3.sld_design_entry.sci
....\..\pro3.rtlv.hdb
....\..\pro3.eco.cdb
....\..\pro3.db_info
....\..\pro3.map.qmsg
....\..\pro3.fit.qmsg
....\..\altsyncram_7531.tdf
....\..\pro3.hier_info
....\..\pro3.sim.qmsg
....\..\pro3.sim.vwf
....\..\pro3.sim.rdb
....\..\pro3.psp
....\..\pro3.dbp
....\..\pro3.map.cdb
....\..\pro3.rpp.qmsg
....\..\pro3.pre_map.cdb
....\..\pro3.map.hdb
....\..\pro3.asm.qmsg
....\..\pro3.tan.qmsg
....\..\pro3.sgdiff.cdb
....\..\pro3.rtlv_sg.cdb
....\..\pro3.cmp0.ddb
....\..\pro3.eds_overflow
....\..\pro3.cmp.qrpt
....\..\pro3.cbx.xml
....\..\pro3.sim.hdb
....\..\pro3.cmp.cdb
....\..\pro3.sim.qrpt
....\..\pro3.sgdiff.hdb
....\..\pro3.sld_design_entry_dsc.sci
....\..\pro3.sgate.rvd
....\..\pro3.sgate_sm.rvd
....\..\pro3.pre_map.hdb
....\..\pro3.rtlv_sg_swap.cdb
....\..\pro3.cmp.hdb
....\..\pro3.hif
....\..\pro3.signalprobe.cdb
....\..\pro3.cmp.tdb
....\pro3.qsf
....\pro3.qpf
....\pro3.qws
....\sipo.bsf
....\pro3.done
....\sopi.bsf
....\ldatasub.vhd
....\ldatasub.cmp
....\ldatasub.bsf
....\databuf.cmp
....\databuf.bsf
....\sipo.vhd
....\pro3.map.rpt
....\pro3.flow.rpt
....\pro3.map.summary
....\pro3.map.eqn
....\pro3.fit.eqn
....\pro3.pin
....\pro3.fit.rpt
....\pro3.fit.summary
....\pro3.sof
....\pro3.pof
....\pro3.asm.rpt
....\pro3.tan.summary
....\pro3.tan.rpt
....\pro3.vwf
....\pro3.c
....\databuf.vhd
....\pro3.sim.rpt
....\pro3.dpf
....\pro3.fld
....\bitcounter_waveforms.html
....\bitcounter_wave0.jpg
....\bitcounter.vhd
....\bitcounter.cmp
....\bitcounter.bsf
....\pro4.bdf
....\pro4.vwf
....\pro3_description.txt
....\sopi.vhd
....\pro5.bdf
....\pro5.vwf
....\pro6.bdf
....\pro6.vwf
....\serv_req_info.txt
....\db
pro3

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