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de0_Demonstrations

  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 3.78mb
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Introduction - If you have any usage issues, please Google them yourself
DE0 development board information, mainly his example, contain a variety of interface program
Packet file list
(Preview for download)
Demonstrations\DE0_Default\DE0_Default.pin
..............\...........\DE0_Default.pof
..............\...........\DE0_Default.qpf
..............\...........\DE0_Default.qsf
..............\...........\DE0_Default.sof
..............\...........\DE0_Default.v
..............\...........\DE0_Default_assignment_defaults.qdf
..............\...........\incremental_db\compiled_partitions\DE0_Default.root_partition.cmp.atm
..............\...........\..............\...................\DE0_Default.root_partition.cmp.dfp
..............\...........\..............\...................\DE0_Default.root_partition.cmp.hdbx
..............\...........\..............\...................\DE0_Default.root_partition.cmp.kpt
..............\...........\..............\...................\DE0_Default.root_partition.cmp.logdb
..............\...........\..............\...................\DE0_Default.root_partition.cmp.rcf
..............\...........\..............\...................\DE0_Default.root_partition.map.atm
..............\...........\..............\...................\DE0_Default.root_partition.map.dpi
..............\...........\..............\...................\DE0_Default.root_partition.map.hdbx
..............\...........\..............\...................\DE0_Default.root_partition.map.kpt
..............\...........\..............\...................\DE0_Default.root_partition.merge_hb.atm
..............\...........\..............\README
..............\...........\output_file.map
..............\...........\V\de0.hex
..............\...........\.\IMG_RAM.bsf
..............\...........\.\IMG_RAM.qip
..............\...........\.\IMG_RAM.v
..............\...........\.\LCD_Controller.v
..............\...........\.\LCD_TEST.v
..............\...........\.\LEDG_Driver.v
..............\...........\.\Reset_Delay.v
..............\...........\.\SEG7_LUT.v
..............\...........\.\SEG7_LUT_4.v
..............\...........\.\VGA_CLK.v
..............\...........\.\VGA_Ctrl.v
..............\...........\.\VGA_OSD_RAM.v
..............\...........\VGA_CLK.bsf
..............\...........\VGA_CLK.qip
..............\....NIOS_SDCARD\.sopc_builder\filters.xml
..............\...............\.............\install.ptf
..............\...............\.............\install2.ptf
..............\...............\.............\preferences.xml
..............\...............\Altera_UP_PS2.v
..............\...............\Altera_UP_PS2_Command_Out.v
..............\...............\Altera_UP_PS2_Data_In.v
..............\...............\altpllpll.bsf
..............\...............\altpllpll.qip
..............\...............\altpllpll.v
..............\...............\altpllpll_bb.v
..............\...............\altpllpll_wave0.jpg
..............\...............\altpllpll_waveforms.html
..............\...............\buttons.v
..............\...............\clk_cnt.v
..............\...............\clock_crossing_bridge.v
..............\...............\cpu.ocp
..............\...............\cpu.sdc
..............\...............\cpu.v
..............\...............\cpu_bht_ram.mif
..............\...............\cpu_dc_tag_ram.mif
..............\...............\cpu_ic_tag_ram.mif
..............\...............\cpu_jtag_debug_module_sysclk.v
..............\...............\cpu_jtag_debug_module_tck.v
..............\...............\cpu_jtag_debug_module_wrapper.v
..............\...............\cpu_mult_cell.v
..............\...............\cpu_ociram_default_contents.mif
..............\...............\cpu_oci_test_bench.v
..............\...............\cpu_rf_ram.mif
..............\...............\cpu_rf_ram_a.mif
..............\...............\cpu_rf_ram_b.mif
..............\...............\cpu_test_bench.v
..............\...............\db\DE0_TOP.db_info
..............\...............\..\DE0_TOP.sld_design_entry.sci
..............\...............\DE0_SOPC.bsf
..............\...............\DE0_SOPC.html
..............\...............\DE0_SOPC.ptf
..............\...............\DE0_SOPC.ptf.8.0
..............\...............\DE0_SOPC.ptf.pre_generation_ptf
..............\..........
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