Which contains a large number of VHDL source program to analyze the analysis quickly download it hope to be useful Kazakhstan...

verilog hd\东南大学Verilog讲义\1.pdf
..........\...................\2.pdf
..........\...................\3.pdf
..........\...................\4.pdf
..........\...................\_desktop.ini
..........\Verilog 教程\_desktop.ini
..........\............\示例.ppt
..........\............\语法.ppt
..........\............\语法2.ppt
..........\............\语法入门.ppt
..........\............\语法进阶.ppt
..........\verilog hdl教程135例\_desktop.ini
..........\....................\source\examples.pdf
..........\....................\......\_desktop.ini
..........\....................\......\chap9\bidir.v
..........\....................\......\.....\bidir2.v
..........\....................\......\.....\code_83.v
..........\....................\......\.....\decode47.v
..........\....................\......\.....\decoder_38.v
..........\....................\......\.....\dff.v
..........\....................\......\.....\dff1.v
..........\....................\......\.....\dff2.v
..........\....................\......\.....\encoder8_3.v
..........\....................\......\.....\gate1.v
..........\....................\......\.....\gate2.v
..........\....................\......\.....\gate3.v
..........\....................\......\.....\jk_ff.v
..........\....................\......\.....\johnson.v
..........\....................\......\.....\latch_1.v
..........\....................\......\.....\latch_2.v
..........\....................\......\.....\latch_8.v
..........\....................\......\.....\mac.v
..........\....................\......\.....\mac_tp.v
..........\....................\......\.....\map_lpm_ram.v
..........\....................\......\.....\mpc.v
..........\....................\......\.....\mpc_tp.v
..........\....................\......\.....\mux_case.v
..........\....................\......\.....\mux_if.v
..........\....................\......\.....\parity.v
..........\....................\......\.....\ram256x8.v
..........\....................\......\.....\reg8.v
..........\....................\......\.....\rom.v
..........\....................\......\.....\serial_pal.v
..........\....................\......\.....\shifter.v
..........\....................\......\.....\tri_1.v
..........\....................\......\.....\tri_2.v
..........\....................\......\.....\updown_count.v
..........\....................\......\.....\_desktop.ini
..........\....................\......\....8\add8_tp.v
..........\....................\......\.....\carry_udp.v
..........\....................\......\.....\carry_udpx1.v
..........\....................\......\.....\carry_udpx2.v
..........\....................\......\.....\count8_tp.v
..........\....................\......\.....\delay.v
..........\....................\......\.....\dff.v
..........\....................\......\.....\dff_udp.v
..........\....................\......\.....\latch.v
..........\....................\......\.....\mult_tp.v
..........\....................\......\.....\mux31.v
..........\....................\......\.....\mux_tp.v
..........\....................\......\.....\random_tp.v
..........\....................\......\.....\rom.v
..........\....................\......\.....\test1.v
..........\....................\......\.....\test2.v
..........\....................\......\.....\time_dif.v
..........\....................\......\.....\_desktop.ini
..........\....................\......\....7\add4_1.v
..........\....................\......\.....\add4_2.v
..........\....................\......\.....\add4_3.v
..........\....................\......\.....\count4.v
..........\....................\......\.....\full_add1.v
..........\....................\......\.....\full_add2.v
..........\....................\......\.....\full_add3.v
..........\....................\......\.....\full_add4.v
..........\....................\......\.....\full_add5.v
..........\....................\......\.....\half_add1.v
..........\....................\......\.....\half_add2.v
..........\....................\......\.....\half_add3.v
..........\....................\.

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