ACTEL FPGA 74HC85 examples demonstrate, Verilog description

Compare_4bit_74hc85\smartgen\smartgen.aws
...................\hdl\Compare_4bit_74hc85.v
...................\viewdraw\vf\project.lst
...................\........\viewdraw.ini
...................\simulation\modelsim.ini.sav
...................\..........\modelsim.ini
...................\designer\impl1\Compare_4bit_74hc85.ide_des
...................\Compare_4bit_74hc85.prj
...................\真值表.bmp
...................\designer\impl1\simulation
...................\viewdraw\vf
...................\........\sch
...................\........\sym
...................\........\wir
...................\designer\impl1
...................\smartgen
...................\hdl
...................\constraint
...................\viewdraw
...................\component
...................\coreconsole
...................\simulation
...................\synthesis
...................\phy_synthesis
...................\stimulus
...................\designer
Compare_4bit_74hc85

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