Based VHDL language AD- TLC549 experimental program has been validated, you can rest assured that the use

AD_TLC549_TEST\ADC_TLC549.bsf
..............\ADC_TLC549.v.bak
..............\ADC_TLC549.vhd
..............\ADC_TLC549.vhd.bak
..............\bin27seg.bsf
..............\bin27seg.vhd
..............\bin27seg.vhd.bak
..............\setup.tcl
..............\tt.asm.rpt
..............\tt.bdf
..............\tt.cdf
..............\tt.done
..............\tt.fit.eqn
..............\tt.fit.rpt
..............\tt.fit.smsg
..............\tt.fit.summary
..............\tt.flow.rpt
..............\tt.map.eqn
..............\tt.map.rpt
..............\tt.map.smsg
..............\tt.map.summary
..............\tt.pin
..............\tt.pof
..............\tt.qpf
..............\tt.qsf
..............\tt.sim.rpt
..............\tt.sof
..............\tt.tan.rpt
..............\tt.tan.summary
..............\tt.vwf
..............\tt_assignment_defaults.qdf
..............\db\add_sub_0fc.tdf
..............\..\add_sub_1fc.tdf
..............\..\add_sub_2fc.tdf
..............\..\add_sub_3dc.tdf
..............\..\add_sub_3fc.tdf
..............\..\add_sub_4dc.tdf
..............\..\add_sub_5dc.tdf
..............\..\add_sub_6dc.tdf
..............\..\add_sub_7dc.tdf
..............\..\add_sub_8dc.tdf
..............\..\add_sub_9dc.tdf
..............\..\add_sub_adc.tdf
..............\..\add_sub_bdc.tdf
..............\..\add_sub_jec.tdf
..............\..\add_sub_kec.tdf
..............\..\add_sub_l4h.tdf
..............\..\add_sub_lec.tdf
..............\..\add_sub_mec.tdf
..............\..\add_sub_nec.tdf
..............\..\add_sub_oec.tdf
..............\..\add_sub_pec.tdf
..............\..\add_sub_qec.tdf
..............\..\add_sub_rec.tdf
..............\..\add_sub_sec.tdf
..............\..\add_sub_tec.tdf
..............\..\add_sub_uec.tdf
..............\..\add_sub_vec.tdf
..............\..\alt_u_div_0ue.tdf
..............\..\alt_u_div_6re.tdf
..............\..\alt_u_div_cre.tdf
..............\..\alt_u_div_eue.tdf
..............\..\lpm_divide_27m.tdf
..............\..\lpm_divide_c8m.tdf
..............\..\lpm_divide_m0m.tdf
..............\..\lpm_divide_v6m.tdf
..............\..\prev_cmp_tt.fit.qmsg
..............\..\sign_div_unsign_8nh.tdf
..............\..\sign_div_unsign_fnh.tdf
..............\..\sign_div_unsign_rlh.tdf
..............\..\sign_div_unsign_ulh.tdf
..............\..\tt.cbx.xml
..............\..\tt.db_info
..............\..\tt.fit.qmsg
..............\..\tt.hier_info
..............\..\tt.hif
..............\..\tt.pre_map.cdb
..............\..\tt.pre_map.hdb
..............\..\tt.rtlv.hdb
..............\..\tt.rtlv_sg.cdb
..............\..\tt.rtlv_sg_swap.cdb
..............\..\tt.sgdiff.cdb
..............\..\tt.sgdiff.hdb
..............\..\tt.sld_design_entry_dsc.sci
..............\..\tt.syn_hier_info
..............\..\wed.wsf
..............\..\prev_cmp_tt.map.qmsg
..............\..\tt.map.qmsg
..............\..\tt.cmp.rdb
..............\..\tt.tis_db_list.ddb
..............\..\tt.sld_design_entry.sci
..............\..\tt.eco.cdb
..............\db
AD_TLC549_TEST

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