Frequency Meter instance, in the FPGA platform, validated by the above, can measure 0-99M of any signal frequency, it is useful, we want to help.

fcount\addc.v
......\addc.v.bak
......\control_core.v
......\counter.v
......\counter.v.bak
......\fcount.asm.rpt
......\fcount.done
......\fcount.dpf
......\fcount.eda.rpt
......\fcount.fit.rpt
......\fcount.fit.smsg
......\fcount.fit.summary
......\fcount.flow.rpt
......\fcount.map.rpt
......\fcount.map.smsg
......\fcount.map.summary
......\fcount.pin
......\fcount.pof
......\fcount.qpf
......\fcount.qsf
......\fcount.sim.rpt
......\fcount.sof
......\fcount.tan.rpt
......\fcount.tan.summary
......\fcount.v
......\fcount.v.bak
......\fcount.vwf
......\fcount_nativelink_simulation.rpt
......\freqcer_1024.v
......\freqcer_10240.v
......\freqcer_103.v
......\latch_4_16.v
......\lcdprint.v
......\lcdprint.v.bak
......\sopc_builder_log.txt
......\.imulation\modelsim\fcount.sft
......\..........\........\fcount.vo
......\..........\........\fcount_modelsim.xrf
......\..........\........\fcount_run_msim_gate_verilog.do
......\..........\........\fcount_run_msim_gate_verilog.do.bak
......\..........\........\fcount_v.sdo
......\..........\........\modelsim.ini
......\..........\........\msim_transcript
......\..........\........\verilog_libs\cycloneii_ver\_info
......\..........\........\............\.............\cycloneii_scale_cntr\_primary.dat
......\..........\........\............\.............\....................\_primary.vhd
......\..........\........\............\.............\..........routing_wire\_primary.dat
......\..........\........\............\.............\......................\_primary.vhd
......\..........\........\............\.............\...........am_register\_primary.dat
......\..........\........\............\.............\......................\_primary.vhd
......\..........\........\............\.............\..............pulse_generator\_primary.dat
......\..........\........\............\.............\.............................\_primary.vhd
......\..........\........\............\.............\..............block\_primary.dat
......\..........\........\............\.............\...................\_primary.vhd
......\..........\........\............\.............\..........pll_reg\_primary.dat
......\..........\........\............\.............\.................\_primary.vhd
......\..........\........\............\.............\.............\_primary.dat
......\..........\........\............\.............\.............\_primary.vhd
......\..........\........\............\.............\..........n_cntr\_primary.dat
......\..........\........\............\.............\................\_primary.vhd
......\..........\........\............\.............\...........mux21\_primary.dat
......\..........\........\............\.............\................\_primary.vhd
......\..........\........\............\.............\..........m_cntr\_primary.dat
......\..........\........\............\.............\................\_primary.vhd
......\..........\........\............\.............\...........ux41\_primary.dat
......\..........\........\............\.............\...............\_primary.vhd
......\..........\........\............\.............\.............21\_primary.dat
......\..........\........\............\.............\...............\_primary.vhd
......\..........\........\............\.............\...........ac_sign_reg\_primary.dat
......\..........\........\............\.............\......................\_primary.vhd
......\..........\........\............\.............\..............out\_primary.dat
......\..........\........\............\.............\.................\_primary.vhd
......\..........\........\............\.............\..............mult_internal\_primary.dat
......\..........\........\............\.............\...........................\_primary.vhd
......\..........\........\............\.............\..................\_primary.dat
......\..........\........\............\.............\..................\_primary.vhd
......\..........\........\............\.............\..............data_reg\_primary.dat
......\..........\........\............\.........

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