LED display shows the dynamic test procedure, the driver constitute 4-16 with two 74LS138 decoder, the 1/16 scan mode.

db\half_clk.asm.qmsg
..\half_clk.cbx.xml
..\half_clk.cmp.cdb
..\half_clk.cmp.hdb
..\half_clk.cmp.rdb
..\half_clk.cmp.tdb
..\half_clk.cmp0.ddb
..\half_clk.db_info
..\half_clk.eco.cdb
..\half_clk.eds_overflow
..\half_clk.fit.qmsg
..\half_clk.hier_info
..\half_clk.hif
..\half_clk.map.cdb
..\half_clk.map.hdb
..\half_clk.map.qmsg
..\half_clk.pre_map.cdb
..\half_clk.pre_map.hdb
..\half_clk.psp
..\half_clk.rtlv.hdb
..\half_clk.rtlv_sg.cdb
..\half_clk.rtlv_sg_swap.cdb
..\half_clk.sgdiff.cdb
..\half_clk.sgdiff.hdb
..\half_clk.sim.hdb
..\half_clk.sim.qmsg
..\half_clk.sim.rdb
..\half_clk.sim.vwf
..\half_clk.sld_design_entry.sci
..\half_clk.sld_design_entry_dsc.sci
..\half_clk.smp_dump.txt
..\half_clk.syn_hier_info
..\half_clk.tan.qmsg
..\half_clk_cmp.qrpt
..\half_clk_sim.qrpt
db
cmp_state.ini
half_clk.cdf
half_clk.qpf
half_clk.v
half_clk.vwf
half_clk.asm.rpt
half_clk.done
half_clk.fit.eqn
half_clk.fit.rpt
half_clk.fit.summary
half_clk.flow.rpt
half_clk.map.eqn
half_clk.map.rpt
half_clk.map.summary
half_clk.pin
half_clk.pof
half_clk.ppl
half_clk.qsf
half_clk.qws
half_clk.sim.rpt
half_clk.tan.rpt
half_clk.tan.summary
serv_req_info.txt

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