simple fpga basic design using VHDL code (4)

clockbuffer.vhd
fuse.log
isim
isim.cmd
isim.hdlsourcefiles
isim.log
isimwavedata.xwv
....\isim.tmp_save
....\.............\_1
....\isimcrash.log
....\simulate_dofile.log
....\work
....\....\sequence.vdb
....\....\testbench.vdb
....\_tmp
....\....\ieee
....\....\....\p_0017514958.didat
....\....\....\p_0774719531.didat
....\....\....\p_1242562249.didat
....\....\....\p_1367372525.didat
....\....\....\p_2592010699.didat
....\....\....\p_2717149903.didat
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....\....\....\p_3499444699.didat
....\....\....\p_3564397177.didat
....\....\....\p_3620187407.didat
....\....\....\p_3972351953.didat
....\....\....\p_4165608084.didat
....\....\std
....\....\...\textio.didat
....\....\work
....\....\....\a_1949178628_2372691052.c
....\....\....\a_1949178628_2372691052.didat
....\....\....\a_1949178628_2372691052.nt.obj
....\....\....\a_3720920268_3212880686.c
....\....\....\a_3720920268_3212880686.didat
....\....\....\a_3720920268_3212880686.nt.obj
....\....\....\testbench_isim_beh.exe_lib.c
....\....\....\testbench_isim_beh.exe_lib.nt.dll
....\....\....\testbench_isim_beh.exe_lib.nt.obj
....\....\....\testbench_isim_beh.exe_main.c
sequence.vhd
sequence_tb.vhd
templates
testbench_beh.prj
testbench_isim_beh.exe
testbench_isim_beh.wfs
top_sequence.bgn
top_sequence.bit
top_sequence.bld
top_sequence.cmd_log
top_sequence.drc
top_sequence.lso
top_sequence.ncd
top_sequence.ngc
top_sequence.ngd
top_sequence.ngr
top_sequence.pad
top_sequence.par
top_sequence.pcf
top_sequence.prj
top_sequence.ptwx
top_sequence.stx
top_sequence.syr
top_sequence.twr
top_sequence.twx
top_sequence.ucf
top_sequence.unroutes
top_sequence.ut
top_sequence.vhd
top_sequence.xpi
top_sequence.xst
top_sequence_guide.ncd
top_sequence_map.map
top_sequence_map.mrp
top_sequence_map.ncd
top_sequence_map.ngm
top_sequence_map.xrpt
top_sequence_ngdbuild.xrpt
top_sequence_pad.csv
top_sequence_pad.txt
top_sequence_par.xrpt
top_sequence_prev_built.ngd
top_sequence_summary.html
top_sequence_summary.xml
top_sequence_usage.xml
top_sequence_vhdl.prj
top_sequence_xst.xrpt
tutorial_4.ipf
tutorial_4.ise
tutorial_4.ntrc_log
tutorial_4.restore
tutorial_4_xdb
..............\cst.xbcd
..............\tmp
..............\...\ise
..............\...\ise.lock
..............\...\...\version
..............\...\...\__OBJSTORE__
..............\...\...\............\Autonym

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