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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 299kb
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  • Author :天***
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Introduction - If you have any usage issues, please Google them yourself
In quartus 2 environment, through the mouth of VHDL programming language PS_2 and compiled successfully.
Packet file list
(Preview for download)
PS_2_v\PS_2.asm.rpt
......\PS_2.cdf
......\PS_2.done
......\PS_2.dpf
......\PS_2.fit.rpt
......\PS_2.fit.smsg
......\PS_2.fit.summary
......\PS_2.flow.rpt
......\PS_2.map.rpt
......\PS_2.map.summary
......\PS_2.pin
......\PS_2.pof
......\PS_2.qpf
......\PS_2.qsf
......\PS_2.qws
......\PS_2.sof
......\PS_2.tan.rpt
......\PS_2.tan.summary
......\PS_2.v
......\PS_2_assignment_defaults.qdf
......\incremental_db\README
......\..............\compiled_partitions\PS_2.root_partition.map.kpt
......\db\PS_2.asm.qmsg
......\..\PS_2.asm_labs.ddb
......\..\PS_2.cbx.xml
......\..\PS_2.cmp.cdb
......\..\PS_2.cmp.hdb
......\..\PS_2.cmp.kpt
......\..\PS_2.cmp.logdb
......\..\PS_2.cmp.rdb
......\..\PS_2.cmp.tdb
......\..\PS_2.cmp0.ddb
......\..\PS_2.cmp2.ddb
......\..\PS_2.db_info
......\..\PS_2.eco.cdb
......\..\PS_2.fit.qmsg
......\..\PS_2.hier_info
......\..\PS_2.hif
......\..\PS_2.lpc.html
......\..\PS_2.lpc.rdb
......\..\PS_2.lpc.txt
......\..\PS_2.map.cdb
......\..\PS_2.map.hdb
......\..\PS_2.map.logdb
......\..\PS_2.map.qmsg
......\..\PS_2.pre_map.cdb
......\..\PS_2.pre_map.hdb
......\..\PS_2.rtlv.hdb
......\..\PS_2.rtlv_sg.cdb
......\..\PS_2.rtlv_sg_swap.cdb
......\..\PS_2.sgdiff.cdb
......\..\PS_2.sgdiff.hdb
......\..\PS_2.sld_design_entry.sci
......\..\PS_2.sld_design_entry_dsc.sci
......\..\PS_2.smp_dump.txt
......\..\PS_2.syn_hier_info
......\..\PS_2.tan.qmsg
......\..\PS_2.tis_db_list.ddb
......\..\PS_2.tmw_info
......\..\prev_cmp_PS_2.asm.qmsg
......\..\prev_cmp_PS_2.fit.qmsg
......\..\prev_cmp_PS_2.map.qmsg
......\..\prev_cmp_PS_2.qmsg
......\..\prev_cmp_PS_2.tan.qmsg
......\incremental_db\compiled_partitions
......\incremental_db
......\db
PS_2_v
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