Introduction - If you have any usage issues, please Google them yourself
(1) non-memory access instructions
Addition instruction ADD Ri, Rj (Ri+ Rj-> Ri)
Subtraction instruction SUB Ri, Rj (Ri-Rj-> Ri)
And instruction AND Ri, Rj (Ri and Rj-> Ri)
Or instructions OR Ri, Rj (Ri or Rj-> Ri)
Register transfer means MOV Ri, Rj (Rj-> Ri)
Immediate transfer instruction MVI Ri, X (X-> Ri)
(2) memory access instructions
Keep the number of instruction STA Ri, X (Ri-> [R7// X])
Fetching instruction LDA Ri, X ([R7// x]-> Ri)
(3) transfer of class instruction
Transfer conditions (zero, in turn) instruction JZ Ri, X (if (Ri = 0) then [R7// X]-> PC)
Unconditional transfer instruction JMP X ([R7// X]-> PC)