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  • Category : VHDL-FPGA-Verilog
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  • Update : 2012-11-26
  • Size : 330kb
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quartusii software simulation code decimal addition counter
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实验2(十进制加法计数器)\cnt10.qpf
.........................\cnt10.qsf
.........................\db\cnt10.db_info
.........................\..\cnt10.rtlv_sg_swap.cdb
.........................\..\cnt10.pre_map.hdb
.........................\..\cnt10.fit.qmsg
.........................\..\cnt10.asm.qmsg
.........................\..\cnt10.cmp.rdb
.........................\..\cnt10.map.hdb
.........................\..\cnt10.tan.qmsg
.........................\..\cnt10.pre_map.cdb
.........................\..\cnt10.rtlv_sg.cdb
.........................\..\cnt10.rtlv.hdb
.........................\..\cnt10.sgdiff.hdb
.........................\..\cnt10.hif
.........................\..\cnt10.hier_info
.........................\..\cnt10.map.cdb
.........................\..\cnt10.map.qmsg
.........................\..\cnt10.sld_design_entry.sci
.........................\..\cnt10.eco.cdb
.........................\..\cnt10.cmp0.ddb
.........................\..\cnt10.cmp.cdb
.........................\..\cnt10.psp
.........................\..\cnt10.cmp.hdb
.........................\..\cnt10.sgdiff.cdb
.........................\..\cnt10.cmp.ddb
.........................\..\cnt10.sim.qmsg
.........................\..\cnt10.cmp.tdb
.........................\..\cnt10.sim.vwf
.........................\..\cnt10.fnsim.hdb
.........................\..\cnt10.syn_hier_info
.........................\..\cnt10.sim.hdb
.........................\..\cnt10.rpp.qmsg
.........................\..\cnt10.sgate.rvd
.........................\..\cnt10.sld_design_entry_dsc.sci
.........................\..\cnt10.sim.rdb
.........................\..\cnt10_cmp.qrpt
.........................\..\cnt10.eds_overflow
.........................\..\cnt10_sim.qrpt
.........................\..\add_sub_klh.tdf
.........................\cnt10.qws
.........................\cmp_state.ini
.........................\cnt10.map.eqn
.........................\cnt10.map.rpt
.........................\cnt10.flow.rpt
.........................\cnt10.map.summary
.........................\cnt10.fit.eqn
.........................\cnt10.pin
.........................\cnt10.fit.rpt
.........................\cnt10.fit.summary
.........................\cnt10.sof
.........................\cnt10.pof
.........................\cnt10.asm.rpt
.........................\cnt10.tan.summary
.........................\cnt10.tan.rpt
.........................\cnt10.done
.........................\cnt10.vwf
.........................\cnt10.sim.rpt
.........................\cnt10.simF.vwf
.........................\cnt10.vhd
.........................\cnt10.simT.vwf
.........................\报告截图.doc
.........................\cnt10.cdf
.........................\实验二.MOD
.........................\含异步清零和同步使能的4位加法计数器.doc
.........................\db
实验2(十进制加法计数器)
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