TRAININ xilinx ISE 11.1

Speedway
........\Fall_09
........\.......\FPGA_Intro
........\.......\..........\lab1
........\.......\..........\....\sources
........\.......\..........\....\.......\FPGA_Intro.ucf
........\.......\..........\....\vhdl
........\.......\..........\....\vlog
........\.......\..........\lab1_solution
........\.......\..........\.............\sources
........\.......\..........\.............\.......\FPGA_Intro.ucf
........\.......\..........\.............\vhdl
........\.......\..........\.............\....\clocking.vhd
........\.......\..........\.............\....\clocking_arwz.ucf
........\.......\..........\.............\....\FPGA_Intro_summary.html
........\.......\..........\.............\....\ISE_Proj
........\.......\..........\.............\....\........\fpga_intro.bgn
........\.......\..........\.............\....\........\fpga_intro.bit
........\.......\..........\.............\....\........\FPGA_Intro.bld
........\.......\..........\.............\....\........\FPGA_Intro.cmd_log
........\.......\..........\.............\....\........\fpga_intro.drc
........\.......\..........\.............\....\........\FPGA_Intro.lso
........\.......\..........\.............\....\........\FPGA_Intro.ncd
........\.......\..........\.............\....\........\FPGA_Intro.ngc
........\.......\..........\.............\....\........\FPGA_Intro.ngd
........\.......\..........\.............\....\........\FPGA_Intro.ngr
........\.......\..........\.............\....\........\FPGA_Intro.pad
........\.......\..........\.............\....\........\FPGA_Intro.par
........\.......\..........\.............\....\........\FPGA_Intro.pcf
........\.......\..........\.............\....\........\FPGA_Intro.prj
........\.......\..........\.............\....\........\FPGA_Intro.ptwx
........\.......\..........\.............\....\........\FPGA_Intro.stx
........\.......\..........\.............\....\........\FPGA_Intro.syr
........\.......\..........\.............\....\........\FPGA_Intro.twr
........\.......\..........\.............\....\........\FPGA_Intro.twx
........\.......\..........\.............\....\........\FPGA_Intro.ucf
........\.......\..........\.............\....\........\FPGA_Intro.unroutes
........\.......\..........\.............\....\........\FPGA_Intro.ut
........\.......\..........\.............\....\........\FPGA_Intro.vhd
........\.......\..........\.............\....\........\FPGA_Intro.xpi
........\.......\..........\.............\....\........\FPGA_Intro.xst
........\.......\..........\.............\....\........\FPGA_Intro_guide.ncd
........\.......\..........\.............\....\........\FPGA_Intro_map.map
........\.......\..........\.............\....\........\FPGA_Intro_map.mrp
........\.......\..........\.............\....\........\FPGA_Intro_map.ncd
........\.......\..........\.............\....\........\FPGA_Intro_map.ngm
........\.......\..........\.............\....\........\FPGA_Intro_map.xrpt
........\.......\..........\.............\....\........\FPGA_Intro_ngdbuild.xrpt
........\.......\..........\.............\....\........\FPGA_Intro_pad.csv
........\.......\..........\.............\....\........\FPGA_Intro_pad.txt
........\.......\..........\.............\....\........\FPGA_Intro_par.xrpt
........\.......\..........\.............\....\........\FPGA_Intro_prev_built.ngd
........\.......\..........\.............\....\........\FPGA_Intro_summary.html
........\.......\..........\.............\....\........\FPGA_Intro_summary.xml
........\.......\..........\.............\....\........\FPGA_Intro_usage.xml
........\.......\..........\.............\....\........\FPGA_Intro_vhdl.prj
........\.......\..........\.............\....\........\FPGA_Intro_xst.xrpt
........\.......\..........\.............\....\........\ipcore_dir
........\.......\..........\.............\....\........\ISE_Proj.gise
........\.......\..........\.............\....\........\ISE_Proj.ise
........\.......\..........\.............\....\........\ISE_Proj.ntrc_log
........\.......\..........\.............\....\........\ISE_Proj.xise
........\.......

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