processor design istruction load pipeline ,hazard

processor_top_vhdl\data_fwd.vhd
..................\decode_stg
..................\..........\ctrl_unit.vhd
..................\..........\decode.vhd
..................\..........\mux_9x2_1.vhd
..................\..........\reg_file.vhd
..................\..........\YRegister.vhd
..................\execute_stg
..................\...........\alu.vhd
..................\...........\alu_ctrl.vhd
..................\...........\AND_gate_level.vhd
..................\...........\Booth.vhd
..................\...........\booth_top.vhd
..................\...........\branch_adder.vhd
..................\...........\CLA_16bit.vhd
..................\...........\CLA_16_bit_alu.vhd
..................\...........\CLA_28bit.vhd
..................\...........\CLA_4bit.vhd
..................\...........\cla_4bit_alu.vhd
..................\...........\execute.vhd
..................\...........\full_adder.vhd
..................\...........\half_adder.vhd
..................\...........\mult_top.vhd
..................\...........\mux6to1.vhd
..................\...........\Mux_2to1_gate_level.vhd
..................\...........\mux_alu_rslt.vhd
..................\...........\NOT_gate_level.vhd
..................\...........\OR_gate_level.vhd
..................\...........\PPG.vhd
..................\...........\ppg_top.vhd
..................\...........\shifter.vhd
..................\...........\transmission_gate.vhd
..................\...........\transmission_gate16.vhd
..................\...........\transmission_gate4.vhd
..................\...........\trans_block.vhd
..................\...........\wallace_8bit.vhd
..................\...........\wallace_tree.vhd
..................\...........\XOR_gate_level.vhd
..................\ex_mem_pipe_reg.vhd
..................\hazard_detect.vhd
..................\id_ex_pipe_reg.vhd
..................\ifetch
..................\......\ifetch.vhd
..................\......\instruction.txt
..................\......\I_mem.vhd
..................\if_id_pipe_reg.vhd
..................\instruction.txt
..................\instr_dump_tbw.tbw
..................\instr_load.vhd
..................\memory_stg
..................\..........\data_mem.vhd
..................\..........\memory.vhd
..................\mem_wb_pipe_reg.vhd
..................\processor_top.vhd
..................\processor_top_tbw.tbw
..................\wave.do
..................\wave2.do
..................\writeback_stg
..................\.............\writeback.vhd
processor_top_vhdl

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