8 bit cpu code using vhdl it performs various operations

cpu25\cpu25.npl
.....\mem.vhd
.....\state.vhd
.....\addrreg.vhd
.....\buffur.vhd
.....\state_tb.tbw
.....\pepExtractor.prj
.....\mem_tb.tbw
.....\cpu.tbw
.....\mem_tb.vhw
.....\mem_tb.ANT
.....\addrreg_tb.tbw
.....\__projnav.log
.....\automake.log
.....\state_tb.vhw
.....\mem_tb.udo
.....\mem_tb.fdo
.....\transcript
.....\state_tb.ANT
.....\state_tb.udo
.....\state_tb.fdo
.....\addrreg_tb.vhw
.....\addrreg_tb.ANT
.....\addrreg_tb.udo
.....\addrreg_tb.fdo
.....\cpu1.vhd
.....\cpu.vhw
.....\cpu.ANT
.....\results.txt
.....\vsim.wlf
.....\cpu1_tb.tbw
.....\cpu25.dhp
.....\alu.vhd
.....\cpu1_tb.vhw
.....\cpu1_tb.ANT
.....\cpu1_tb.udo
.....\cpu1_tb.fdo
.....\top_tb.tbw
.....\top1_tb.ado
.....\top_tb.vhw
.....\alu_tb.tbw
.....\top_tb.ANT
.....\alu_tb.vhw
.....\alu_tb.ANT
.....\top_tb.udo
.....\top_tb.fdo
.....\wave.do
.....\pc11
.....\top1_tb.tbw
.....\alu_tb.udo
.....\alu_tb.fdo
.....\reg.vhd
.....\top1_tb.udo
.....\top1_tb.vhw
.....\top1_tb.ANT
.....\reg_tb.tbw
.....\top1_tb.fdo
.....\reg_tb.vhw
.....\reg_tb.ANT
.....\top1_tb.jhd
.....\reg_tb.udo
.....\reg_tb.fdo
.....\pc_tb.vhw
.....\pc_tb.ANT
.....\pc_tb.udo
.....\addreg.vhd
.....\addreg_tb.tbw
.....\addreg_tb.vhw
.....\addreg_tb.ANT
.....\addreg_tb.udo
.....\addreg_tb.fdo
.....\ir.vhd
.....\ir_tb.tbw
.....\ir_tb.vhw
.....\ir_tb.ANT
.....\ir_tb.udo
.....\ir_tb.fdo
.....\cpu.vhd
.....\top.vhd
.....\pc1_tb.vhw
.....\pc1_tb.ANT
.....\pc1_tb.udo
.....\pc.vhd
.....\pc3_tb.tbw
.....\pc3_tb.vhw
.....\pc3_tb.ANT
.....\pc3_tb.udo
.....\pc3_tb.fdo
.....\pc_tb.tbw
.....\pc_tb.fdo
.....\pc9_tb.tbw
.....\pc9_tb.vhw
.....\pc9_tb.ANT
.....\pc9_tb.udo
.....\pc9_tb.fdo
.....\pcf_tb.tbw
.....\pcf_tb.vhw
.....\pcf_tb.ANT
.....\pcf_tb.udo
.....\pcf_tb.fdo

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