HDLC controller base on FPGA

hdlc\CVS\Root
....\...\Repository
....\...\Template
....\...\Entries
....\.ODE\CVS\Root
....\....\...\Repository
....\....\...\Template
....\....\...\Entries
....\....\MEM_PKG.VHD
....\....\SPMEM.VHD
....\....\tools_pkg.vhd
....\....\LIBS\CVS\Root
....\....\....\...\Repository
....\....\....\...\Template
....\....\....\...\Entries
....\....\....\PCK_CRC16_D8.vhd
....\....\....\hdlc_components_pkg.vhd
....\....\RX\CVS\Root
....\....\..\...\Repository
....\....\..\...\Template
....\....\..\...\Entries
....\....\..\.ORE\CVS\Root
....\....\..\....\...\Repository
....\....\..\....\...\Template
....\....\..\....\...\Entries
....\....\..\....\RxChannel.vhd
....\....\..\....\Rxcont.vhd
....\....\..\....\Zero_detect.vhd
....\....\..\....\flag_detect.vhd
....\....\..\SCRIPTS\CVS\Root
....\....\..\.......\...\Repository
....\....\..\.......\...\Template
....\....\..\.......\...\Entries
....\....\..\.......\WAVE.DO
....\....\..\TB\CVS\Root
....\....\..\..\...\Repository
....\....\..\..\...\Template
....\....\..\..\...\Entries
....\....\..\..\Rx_tb.vhd
....\....\TOP\CVS\Root
....\....\...\...\Repository
....\....\...\...\Template
....\....\...\...\Entries
....\....\...\core\CVS\Root
....\....\...\....\...\Repository
....\....\...\....\...\Template
....\....\...\....\...\Entries
....\....\...\....\RxBuff.vhd
....\....\...\....\RxFCS.vhd
....\....\...\....\RxSync.vhd
....\....\...\....\TxBuff.vhd
....\....\...\....\TxFCS.vhd
....\....\...\....\TxSync.vhd
....\....\...\....\WB_IF.vhd
....\....\...\....\hdlc.vhd
....\....\...\scripts\CVS\Root
....\....\...\.......\...\Repository
....\....\...\.......\...\Template
....\....\...\.......\...\Entries
....\....\...\.......\model\CVS\Root
....\....\...\.......\.....\...\Repository
....\....\...\.......\.....\...\Template
....\....\...\.......\.....\...\Entries
....\....\...\.......\.....\build_TxFCS_Buff.do
....\....\...\.......\.....\build_hdlc_top.do
....\....\...\.......\.....\wave.do
....\....\...\.......\nc-sim\CVS\Root
....\....\...\.......\......\...\Repository
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....\....\...\.......\......\...\Entries
....\....\...\.......\......\build_RxFCS_Buff.csh
....\....\...\.......\......\build_TxFCS_Buff.csh
....\....\...\.......\......\build_hdlc_top.csh
....\....\...\.......\......\cds.lib
....\....\...\.......\......\hdl.var
....\....\...\tb\CVS\Root
....\....\...\..\...\Repository
....\....\...\..\...\Template
....\....\...\..\...\Entries
....\....\...\..\RxTop_tb.vhd
....\....\...\..\TxTop_tb.vhd
....\....\...\..\hdlc_tb.vhd
....\....\.X\CVS\Root
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....\....\..\core\CVS\Root
....\....\..\....\...\Repository
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....\....\..\....\...\Entries
....\....\..\....\TXcont.vhd
....\....\..\....\TxChannel.vhd
....\....\..\....\flag_ins.vhd
....\....\..\....\zero_ins.vhd
....\....\..\scripts\CVS\Root
....\....\..\.......\...\Repository
....\....\..\.......\...\Template
....\....\..\.......\...\Entries
....\....\..\.......\wave.do
....\....\..\tb\CVS\Root

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