This article provides a CMOS Controller, so that Nios II can take advantage of CMOS Controller control CMOS, and allowed to deliver on the SDRAM in the CMOS image. Run on DE2-70 platform

DE2_70_D5M_LTM_NIOS_capture
...........................\altpllpll.ppf
...........................\altpllpll.qip
...........................\altpllpll.v
...........................\cmos0.v
...........................\cpu.ocp
...........................\cpu.sdc
...........................\cpu.v
...........................\cpu_bht_ram.mif
...........................\cpu_dc_tag_ram.mif
...........................\cpu_ic_tag_ram.mif
...........................\cpu_jtag_debug_module_sysclk.v
...........................\cpu_jtag_debug_module_tck.v
...........................\cpu_jtag_debug_module_wrapper.v
...........................\cpu_mult_cell.v
...........................\cpu_ociram_default_contents.mif
...........................\cpu_rf_ram_a.mif
...........................\cpu_rf_ram_b.mif
...........................\cpu_test_bench.v
...........................\db
...........................\DE2_70.qpf
...........................\DE2_70.qsf
...........................\DE2_70.qws
...........................\hardware
...........................\........\CCD_Capture.v
...........................\........\DE2_70.v
...........................\........\I2C_CCD_Config.v
...........................\........\I2C_Controller.v
...........................\........\I2S_Controller.v
...........................\........\lcd_3wire_config.v
...........................\........\Line_Buffer.bsf
...........................\........\Line_Buffer.v
...........................\........\Line_Buffer_dval.bsf
...........................\........\Line_Buffer_dval.v
...........................\........\RAW2RGB.v
...........................\........\Reset_Delay.v
...........................\........\Sdram_Control_4Port
...........................\........\...................\command.v
...........................\........\...................\control_interface.v
...........................\........\...................\Sdram_Control_4Port.v
...........................\........\...................\Sdram_FIFO.v
...........................\........\...................\Sdram_Params.h
...........................\........\...................\Sdram_PLL.bsf
...........................\........\...................\Sdram_PLL.ppf
...........................\........\...................\Sdram_PLL.v
...........................\........\...................\sdr_data_path.v
...........................\........\sdram_pll.v
...........................\........\SEG7_LUT.v
...........................\........\SEG7_LUT_8.v
...........................\........\touch_tcon.v
...........................\........\vga_pll.v
...........................\ip
...........................\..\CMOS_Controller
...........................\..\...............\CMOS_Controller.v
...........................\..\...............\CMOS_Controller_hw.tcl
...........................\..\...............\inc
...........................\..\...............\...\CMOS_Controller_HAL.h
...........................\jtag_uart.v
...........................\nios_ii.bsf
...........................\nios_ii.ptf
...........................\nios_ii.ptf.pre_generation_ptf
...........................\nios_ii.qip
...........................\nios_ii.sopc
...........................\nios_ii.sopcinfo
...........................\nios_ii.v
...........................\nios_ii_clock_0.v
...........................\nios_ii_generation_script
...........................\nios_ii_log.txt
...........................\nios_ii_setup_quartus.tcl
...........................\pll.sdc
...........................\pll.v
...........................\release
...........................\.......\DE2_70.sof
...........................\software
...........................\........\hello_world_0
...........................\........\.............\.cdtbuild
...........................\........\.............\.cdtproject
...........................\........\.............\.project
...........................\........\.............\application.stf
...........................\........\.............\Debug
...........................\........\.............\.....\

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