under the verilog HDL Finite State Machine (FSM), the sparrow may be small, but is a fully-equipped! Worth a visit! !

state
.....\db
.....\..\prev_cmp_state.map.qmsg
.....\..\prev_cmp_state.qmsg
.....\..\prev_cmp_state.sim.qmsg
.....\..\state.atom.rvd
.....\..\state.cbx.xml
.....\..\state.cmp.rdb
.....\..\state.dbp
.....\..\state.db_info
.....\..\state.eco.cdb
.....\..\state.eds_overflow
.....\..\state.fnsim.hdb
.....\..\state.fnsim.qmsg
.....\..\state.hier_info
.....\..\state.hif
.....\..\state.map.ecobp
.....\..\state.map.qmsg
.....\..\state.map_bb.logdb
.....\..\state.pre_map.cdb
.....\..\state.pre_map.hdb
.....\..\state.psp
.....\..\state.pss
.....\..\state.rpp.qmsg
.....\..\state.rtlv.hdb
.....\..\state.rtlv_sg.cdb
.....\..\state.rtlv_sg_swap.cdb
.....\..\state.sgate.rvd
.....\..\state.sgate_sm.rvd
.....\..\state.sgdiff.cdb
.....\..\state.sgdiff.hdb
.....\..\state.sim.cvwf
.....\..\state.sim.hdb
.....\..\state.sim.qmsg
.....\..\state.sim.rdb
.....\..\state.simfam
.....\..\state.sld_design_entry.sci
.....\..\state.sld_design_entry_dsc.sci
.....\..\state.syn_hier_info
.....\..\state.tan.qmsg
.....\..\state.tis_db_list.ddb
.....\..\wed.wsf
.....\fsm.v
.....\fsm.v.bak
.....\state.done
.....\state.flow.rpt
.....\state.map.rpt
.....\state.map.summary
.....\state.qpf
.....\state.qsf
.....\state.qws
.....\state.sim.rpt
.....\state.vwf

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