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  • Update : 2012-11-26
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Introduction - If you have any usage issues, please Google them yourself
To collect some of their articles on the DDS, the main principle on the DDS and how to use DDS to achieve verilog
Packet file list
(Preview for download)
FilenameSizeUpdate
dds.txt
DDS原理简介(中文).pdf
dds毕业设计
...........\5毕业论文.doc
dds毕业设计.rar
实现了多种基本波形,及fm,askpsk
.................................\dds_ qua
.................................\........\acc.bsf
.................................\........\acc.v
.................................\........\acc_bb.v
.................................\........\acc_waveforms.html
.................................\........\address_decode.bsf
.................................\........\address_decode.v
.................................\........\addrlatch.bdf
.................................\........\addrlatch.bsf
.................................\........\assignment_defaults.qdf
.................................\........\atof.bsf
.................................\........\atof.v
.................................\........\cmp_state.ini
.................................\........\control.bsf
.................................\........\control.v
.................................\........\count.bsf
.................................\........\count.v
.................................\........\count_bb.v
.................................\........\count_waveforms.html
.................................\........\db
.................................\........\..\accum_4me.tdf
.................................\........\..\accum_56g.tdf
.................................\........\..\add_sub_01h.tdf
.................................\........\..\add_sub_11h.tdf
.................................\........\..\add_sub_31h.tdf
.................................\........\..\add_sub_a0i.tdf
.................................\........\..\add_sub_jvg.tdf
.................................\........\..\add_sub_r0h.tdf
.................................\........\..\add_sub_t0h.tdf
.................................\........\..\altsyncram_1f41.tdf
.................................\........\..\altsyncram_7k41.tdf
.................................\........\..\cntr_tt6.tdf
.................................\........\..\cntr_ut6.tdf
.................................\........\..\dds.asm.qmsg
.................................\........\..\dds.atom.rvd
.................................\........\..\dds.cmp.cdb
.................................\........\..\dds.cmp.ddb
.................................\........\..\dds.cmp.hdb
.................................\........\..\dds.cmp.rdb
.................................\........\..\dds.cmp.tdb
.................................\........\..\dds.cmp0.ddb
.................................\........\..\dds.db_info
.................................\........\..\dds.eco.cdb
.................................\........\..\dds.eds_overflow
.................................\........\..\dds.fit.qmsg
.................................\........\..\dds.hier_info
.................................\........\..\dds.hif
.................................\........\..\dds.icc
.................................\........\..\dds.map.cdb
.................................\........\..\dds.map.hdb
.................................\........\..\dds.map.qmsg
.................................\........\..\dds.pre_map.cdb
.................................\........\..\dds.pre_map.hdb
.................................\........\..\dds.psp
.................................\........\..\dds.rpp.qmsg
.................................\........\..\dds.rtlv.hdb
.................................\........\..\dds.rtlv_sg.cdb
.................................\........\..\dds.rtlv_sg_swap.cdb
.................................\........\..\dds.sgate.rvd
.................................\........\..\dds.sgdiff.cdb
.................................\........\..\dds.sgdiff.hdb
.................................\........\..\dds.signalprobe.cdb
.................................\........\..\dds.sim.hdb
.................................\........\..\dds.sim.qmsg
.................................\........\..\dds.sim.rdb
.................................\........\..\dds.sim.vwf
.................................\........\..\dds.sld_design_entry.sci
.................................\........\..\dds.s
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