Verilog language using the PS2 keyboard and a small 1602 LCD display features. No changes have been adopted debugging. Directly as a module for the FPGA/CPLD system development process. This code is my development environment in Libra when written in Actel FPGA.

Clock_Gen.v
LCD_Driver.v
LCD_Top.v
PLL_1M.v
ps2key.v
PS2_LCD_Top.v
Top.v

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