See each code within the compressed package file name, respectively, for the use of the AD9627 single-chip control of code, has been in the hardware circuit FPGA-based DDR SDRAM control source code, will be adding a document folder to the same project and three FPGA internal learning materials. C code development environment for KeilC, verilog code development environment for the Quartus.

AD9627_Ccode.rar
Modelsim使用指南(较好!).rar
SDRAM Verilog代码及测试程序.rar
华为FPGA设计流程指南.rar
基于FPGA的DDR SDRAMverilog代码.rar
西安大唐--FPGA&CPLD数字电路设计经验分享.rar

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