VHDL grammar used to express achieve dilation,

dilation1
.........\Block1.bdf
.........\cmp_state.ini
.........\db
.........\..\dilation.asm.qmsg
.........\..\dilation.cmp.rdb
.........\..\dilation.csf.qmsg
.........\..\dilation.db_info
.........\..\dilation.dilation.sld_design_entry.sci
.........\..\dilation.fit.qmsg
.........\..\dilation.hif
.........\..\dilation.icc
.........\..\dilation.map.hdb
.........\..\dilation.map.qmsg
.........\..\dilation.pre_map.hdb
.........\..\dilation.project.hdb
.........\..\dilation.rtlv.hdb
.........\..\dilation.rtlv_sg.cdb
.........\..\dilation.rtlv_sg_swap.cdb
.........\..\dilation.sgdiff.cdb
.........\..\dilation.sgdiff.hdb
.........\..\dilation.tan.qmsg
.........\..\dilation_cmp.qrpt
.........\..\dilation_hier_info
.........\..\dilation_syn_hier_info
.........\dilation.asm.rpt
.........\dilation.done
.........\dilation.fit.eqn
.........\dilation.fit.rpt
.........\dilation.flow.rpt
.........\dilation.map.eqn
.........\dilation.map.rpt
.........\dilation.pin
.........\dilation.pof
.........\dilation.qpf
.........\dilation.qsf
.........\dilation.qws
.........\dilation.sof
.........\dilation.tan.rpt
.........\dilation.tan.summary
.........\dilation.v
.........\shift.bsf
.........\shift.v
.........\shift_bb.v

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