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FPGA procedures, verilog HDL language stopwatch program, developed using quartus II 13.0, verilog HDL beginner students can refer
Date : 2025-08-23 Size : 2.81mb User : suchenguang

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51 single-drive dual DC motor drive
Date : 2025-08-23 Size : 1kb User : 郑立

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STC12C5A60S2 single IO AD through its own control multiple keys themselves have been tested for the project.
Date : 2025-08-23 Size : 3kb User : fengjunjun

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Data stc12c5a60s2 developed some modules, modules complete available.
Date : 2025-08-23 Size : 22kb User : fengjunjun

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关闭翻译英语中文德语检测语言 中文(简体)英语日语 翻译文字或网页 基于51控制64位FLASH,SSTf064的测试源码。源码经过测试,采用SPI通信。 请键入文字或网站地址,或者上传文档。 取消 Jīyú 51 kòngzhì 64 wèi FLASH,SSTf064 de cèshì yuánmǎ. Yuánmǎ jīngguò cèshì, Based on 51 control 64 FLASH, SSTf064 test s
Date : 2025-08-23 Size : 6kb User : fengjunjun

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Realization of sin and cos functions, floating point differential table method of sampling points can be varied to achieve fft function
Date : 2025-08-23 Size : 1kb User : 田承有

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51 Microcontroller C Programming Language (a) There are two assembly language to language and C, contains a variety of basic procedures, along with the algorithm described
Date : 2025-08-23 Size : 440kb User : 罗雨

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stm32 control rc522, RFID applications embedded on the arm
Date : 2025-08-23 Size : 1.4mb User : 王豹利

UCOSII based operating system Freemodbus protocol on STM32F103RBT6' s. Development environment for IAR6.3
Date : 2025-08-23 Size : 647kb User : yang

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OV7725 camera chip initialization procedure, 60fps frames, is a practical CMOS digital camera
Date : 2025-08-23 Size : 8.17mb User : Truth

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Freescale smart car program, XS128 chip-based system to establish a balance
Date : 2025-08-23 Size : 377kb User : Truth

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PIC18F452 ususing proteus development
Date : 2025-08-23 Size : 16kb User : kaoxiang
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