VHDL-FPGA-Verilog List Page 93

VHDL-FPGA-Verilog list

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MAC网络控制的物理层控制程(VHDL) Downloaded：0: The physical layer control of MAC network control (VHDL)
Date : 2026-01-02 Size : 8kb User : 卢生
cpu_uart_leds_ip Downloaded：0: Based on Altera's IP core, to complete the serial transceiver, as well as custom IP, as a custom AXI bus interface example
Date : 2026-01-02 Size : 18.87mb User : 机智的伟哥哥
major1_contrast Downloaded：0: code to enhance a picture in verilog.
Date : 2026-01-02 Size : 1.7mb User : nishusingla
major_threshold Downloaded：0: code to perform thresholding operation on a picture
Date : 2026-01-02 Size : 3.96mb User : nishusingla
major_brightness Downloaded：0: code to perform brightness operation
Date : 2026-01-02 Size : 1.81mb User : nishusingla
major1 Downloaded：0: code for inverting an image in verilog
Date : 2026-01-02 Size : 31kb User : nishusingla
Minor-1 Downloaded：0: code for "booth multiplier" using verilog
Date : 2026-01-02 Size : 580kb User : nishusingla
DE2_70_D5M_LTM Downloaded：0: filtre de sobel sur fpga
Date : 2026-01-02 Size : 197kb User : jordra
DE2_70_D5M_LTM_sobel_dilation Downloaded：0: DE2_70_D5M_LTM_sobel_dilation
Date : 2026-01-02 Size : 243kb User : jordra
DE2_70 sobel Downloaded：0: DE2_70 sobel_dilationdsd
Date : 2026-01-02 Size : 232kb User : jordra
Altshift_tabs_lab0 Downloaded：0: programme en vhdl sur fpga
Date : 2026-01-02 Size : 33kb User : jordra
counter_verilog Downloaded：0: DE2_70_D5M_LTM_sobel_dilation
Date : 2026-01-02 Size : 16kb User : jordra

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