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VHDL-FPGA-Verilog list
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new_pwm
Downloaded:0
A PWM parameters, and there are all the simulation results, in the Quartus software to open, own design
Date
: 2025-08-18
Size
: 226kb
User
:
杨杨
new_compare
Downloaded:0
This is a timing comparator, when the data a and b when a high number of consistent data, we can design according to their own amendments to the relevant parameters
Date
: 2025-08-18
Size
: 352kb
User
:
杨杨
vhdlgenerateofsentencegrammarapplication
Downloaded:0
Experimental VHDL Counter: generate statement application
Date
: 2025-08-18
Size
: 1kb
User
:
王天辉
DS18B20_VHDL
Downloaded:0
FPGA DS18B20 test temperature VHDL source code
Date
: 2025-08-18
Size
: 149kb
User
:
张焱
AD0804_FPGA_VHDL
Downloaded:0
FPGA control serial AD (AD0804), state machine to achieve, you can program according to the digital voltage, the digital thermometer design
Date
: 2025-08-18
Size
: 262kb
User
:
张焱
VGA_example
Downloaded:0
FPGA/cpld control display VHDL source code, there are test procedures
Date
: 2025-08-18
Size
: 941kb
User
:
张焱
xu
Downloaded:0
Sequence generator, producing an 8-bit serial number, serial code can be customized to amend, there is a sequence detector
Date
: 2025-08-18
Size
: 766kb
User
:
郭明
count
Downloaded:0
Variable modulus counter, can be realized mode 2 mode 8-mode 10 mode 16, Asynchronous Clear, variable modulus counting addition and subtraction
Date
: 2025-08-18
Size
: 199kb
User
:
郭明
shift
Downloaded:0
Shift Register, Asynchronous Clear, asynchronous purchase the number of controllable left shifted to right with a cyclic shift function
Date
: 2025-08-18
Size
: 193kb
User
:
郭明
i2c_master_bit_ctrl
Downloaded:0
The code used Verilog hardware description language description of the system bus interface I2C control bit bit-switching model. Learning I2C bus interface FPGA and a great help.
Date
: 2025-08-18
Size
: 2kb
User
:
fengxinya
UART232
Downloaded:0
The VHDL language code is a comprehensive, systematic description of UART communication protocol standards, through the UART to the practical application of data communications, to more fully understand and grasp the VHD
Date
: 2025-08-18
Size
: 22kb
User
:
fengxinya
64
Downloaded:0
64-bit multiplier, bit-ahead, let us look at the adoption of simulation, verilog of
Date
: 2025-08-18
Size
: 37kb
User
:
«
1
2
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.90
.91
.92
.93
.94
4095
.96
.97
.98
.99
.00
...
4310
»
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