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VHDL-FPGA-Verilog list
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ByteBlasterII
Downloaded:0
ModelSim detailed introduction of the use of methods, good
Date
: 2025-05-23
Size
: 276kb
User
:
李志华
tra_control
Downloaded:0
Based on the Verilog Programming Maxplus2 achieve functional traffic lights (including a countdown)
Date
: 2025-05-23
Size
: 2kb
User
:
侯玉建
Serial_CRC
Downloaded:0
CRC checksum method of serial realize, verilog source code, the use of linear feedback shift register method, the realization of simple serial communication protocol for the CRC checksum.
Date
: 2025-05-23
Size
: 1kb
User
:
徐亮
VHDL-Cookbook
Downloaded:0
VHDL-Cookbook novice VHDL good information.
Date
: 2025-05-23
Size
: 234kb
User
:
花玉良
VHDL-quick-start
Downloaded:0
VHDL-quick-start learning VHDL good, fast start. And English languages.
Date
: 2025-05-23
Size
: 82kb
User
:
花玉良
ESA-ModelGuide
Downloaded:0
VHDL Modelling GuidelinesVHDL Programming
Date
: 2025-05-23
Size
: 156kb
User
:
tutdac99
Downloaded:0
Analog and Mixed-Signal Modeling Using the VHDL-AMS Language
Date
: 2025-05-23
Size
: 408kb
User
:
huayuliang
Maze_solver
Downloaded:0
Maze robot C++ Source. The use of IR Sensor, P9000 electrical, Altera microprocessor, L293D chip control. Have all the features of the corresponding marked
Date
: 2025-05-23
Size
: 3kb
User
:
clark
s3c2410_code_Test
Downloaded:0
S3C2410 development board of the test code, including lcd, led, button, interrupt testing
Date
: 2025-05-23
Size
: 1.98mb
User
:
wenger
MyFPGA
Downloaded:0
SRAM FPGA system soft simulation designed to realize bitwise write bitwise Reading.
Date
: 2025-05-23
Size
: 216kb
User
:
wenger
synplicity
Downloaded:0
Synplicity learning materials, the article introduced in detail in the VHDL simulation software in the simulation process
Date
: 2025-05-23
Size
: 815kb
User
:
hufeng
ETHERNET
Downloaded:1
With GMII interface and feature ARP protocol Gigabit Ethernet controller. After Xilinx SPATAN-III FPGA verification, Verilog description
Date
: 2025-05-23
Size
: 68kb
User
:
winwalk
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