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VHDL-FPGA-Verilog list
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UART-botelv115200
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FPGA-based serial transceiver procedures, 115200 baud rate, pro-test, can be used.
Date : 2025-12-30 Size : 2.27mb User : Grace
MUX41
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Four one of the selector FPGA source code, including the module Verilog files and test testbench files
Date : 2025-12-30 Size : 112kb User : JJ
ADDR
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8 full adder, including half adder, full adder Verilog file, Verilog file, 8 full adder Verilog files, and 8 full adder test testbench file
Date : 2025-12-30 Size : 138kb User : JJ
cnt2
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16-bit binary counter and design codes and test code (vhdl)
Date : 2025-12-30 Size : 2kb User : cassy
mips
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Verilog language-based development pipeline cpu mips instruction set support only part of the instruction
Date : 2025-12-30 Size : 15kb User : DY
myproject3
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Implemented in FPGA car tracking control, and the use of infrared remote control car
Date : 2025-12-30 Size : 3.76mb User : wang
Plong-master
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Pong game use VGA controller
Date : 2025-12-30 Size : 17kb User : Sergiu
code
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Achieve RGB TTL signal output- can push any resolution TFT
Date : 2025-12-30 Size : 54kb User : 黄同意
Filtro
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Digital filter in VHDL
Date : 2025-12-30 Size : 1kb User : jossss
sin
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Using VHDL language to achieve the following functions: PLL, reset, clock synchronization, frequency divider, counter to generate sine wave, and then scrambling on the filter shaping filter with FIR, finally get the outp
Date : 2025-12-30 Size : 6.47mb User : 猪头
01_run_led
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FPGA source code is the use of EP4CE15F17C8N hardware platform for water lamp source
Date : 2025-12-30 Size : 3.1mb User :
02_run_flash_led
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FPGA data EP4CE15F17C8N is used in the hardware platform of marquee source
Date : 2025-12-30 Size : 3.1mb User :
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