VHDL-FPGA-Verilog List Page 4031

VHDL-FPGA-Verilog list

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VHDLexample Downloaded：0: VHDL example is I have learned since the collection of VHDL, and that out of sharing, the next you want to Kazakhstan
Date : 2025-05-25 Size : 32kb User : 陆见风
DDS_all Downloaded：0: The EDA is a very good programming, is the Electronic Design Competition during the preparation I was proud to one capable of producing sine, cosine, square wave (variable duty cycle), triangle wave, sawtooth wave and a
Date : 2025-05-25 Size : 2.13mb User : 谢飞
FPGA_VRILOG Downloaded：0: Based on a set of XILIX, SPATAN2, XC2S200 chip experimental board, 10 of VRILOGHDL typical FPGA experiments help
Date : 2025-05-25 Size : 11kb User : liao
tclk Downloaded：0: ALARM = 1 when called buzzer.- The first 50 seconds when called, asking for 10 seconds, 9 seconds before the bass, treble Finally one seconds.- Treble for 500HZ, bass for the 250HZ.- Hold down the MS1 (ML1 lights out) au
Date : 2025-05-25 Size : 1kb User : 郝保峰
adder8b Downloaded：0: This procedure is to use two four parallel binary adder cascade manner through an 8-bit adder.
Date : 2025-05-25 Size : 1kb User : liushenshen
sdram_ctrl.tar Downloaded：0: Synchronous Dynamic RAM control circuit VHDL source code, in the SOC development can be applied directly
Date : 2025-05-25 Size : 88kb User : 26
video_compression_systems.tar Downloaded：0: Video Compression IPCORE, designed more for the hardware design engineers to improve reference
Date : 2025-05-25 Size : 182kb User : 26
chk Downloaded：0: This procedure implements a sequence detector. When a string of serial data to be tested after entering the detector, if the number in each successive detection with the same number of preset password, then output A , ot
Date : 2025-05-25 Size : 1kb User : liushenshen
VHDL Downloaded：0: Xi an Polytechnic very useful information, suitable for beginners
Date : 2025-05-25 Size : 833kb User : 马雷
chengxu Downloaded：0: MaxplusII used in the VHDL language programming realization of digital base-band signal synchronization extraction, is a password input and modify the examples. Experimental box in the hardware connection, and will downl
Date : 2025-05-25 Size : 760kb User : 李磊
ADcaiyang Downloaded：0: A/D sampling control module designed A/D sampling control modules responsible for controlling external ADC0809 chip multi-channel analog input, as well as the amount of strobe to achieve A/D sampling the reasonable contr
Date : 2025-05-25 Size : 1kb User : xuye
UARTRS232 Downloaded：0: Using UART to receive PC-RS232 serial interface data. As the UART receive only 8-bit data, so to receive two 8-bit data after its deposit in 16 of the SRAM.
Date : 2025-05-25 Size : 1kb User : xuye

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