VHDL-FPGA-Verilog List Page 3869

VHDL-FPGA-Verilog list

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uart Downloaded：0: Use VHDL to achieve a UART controller, input clock for the 33M
Date : 2025-06-12 Size : 1kb User : mu
pwm-c Downloaded：0: VHDL prepared using PWM control procedures, through the registers to control more than 20 road PWM output qar is Quartus compressed packet format
Date : 2025-06-12 Size : 117kb User : mu
Veriloghuangjincankaozhinan Downloaded：0: Verilog Golden Reference Guide is the Verilog hardware description language and its syntax and semantics combined it applied to hardware design, a concise Quick Reference Guide
Date : 2025-06-12 Size : 458kb User : 江利腾
JIANCHE Downloaded：0: The design is a sequence detector, can detect a long series of 11 signals, according to the needs may be appropriate to expand its sequence length
Date : 2025-06-12 Size : 334kb User : liuxiaozhong
jishuqi Downloaded：0: This article counters 11 Experimental report on the design ideas, design specific programs, as well as steps on the machine, described in great detail!
Date : 2025-06-12 Size : 119kb User : liuxiaozhong
pinlvji Downloaded：0: In this paper, with 11 Cymometer VHDL design program description, the design sets out design ideas, steps and design the ultimate code, the design is very detailed, it is essential that you study aids!
Date : 2025-06-12 Size : 147kb User : liuxiaozhong
shuzizhong2008 Downloaded：0: This paper describes the design of digital clock program and the specific design steps and code, function more comprehensive and can be directly used for curriculum design!
Date : 2025-06-12 Size : 79kb User : liuxiaozhong
4weishuzipinlvjikongzhimokuai Downloaded：0: Verilog HDL under four digital frequency meter control module source code
Date : 2025-06-12 Size : 3kb User : 李少洋
v2c5_sopc_leds Downloaded：0: FPGA in NIOS2led display program very suitable for beginners
Date : 2025-06-12 Size : 6.83mb User : 肖文
verilog_cookbook Downloaded：0: The electronic file for verilog cookbook, includes communications, imaging, DSP and other important commonly used Verilog coding, can be used as engineer with the reference manual for beginners
Date : 2025-06-12 Size : 2.72mb User : siman,Chen
kbclj Downloaded：0: Programmable Logic VHDL system design technology, early classic VHDL Guide to CYPRESS device based on the hope that all of you to help!
Date : 2025-06-12 Size : 11.68mb User : guolh
16_FIR Downloaded：1: 16-order FIR filter - this design USES the VERILOG HDL language serial DA algorithm to realize the 16-order finite frequency response filter! -16-order FIR filter- this design language VERILOG HDL serial DA algorithm lim
Date : 2025-06-12 Size : 781kb User : yuming

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