VHDL-FPGA-Verilog List Page 3741

VHDL-FPGA-Verilog list

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fequency Downloaded：0: VHDL language used to describe the project examples Cymometer (quartus 7.2 at the use of)
Date : 2025-06-20 Size : 199kb User : shenhuan
FPEGVHDL Downloaded：0: This is my study at FPEG/VHDL Express entry and improve engineering practice when the book written by one of the relevant code. However hard I organize out ah. Hope to have helped the U.S. ... ...
Date : 2025-06-20 Size : 3kb User : Zachary
chufaqi Downloaded：0: Sequential circuit is the output depends not only on its input at that time, but also on past input, that is different from the last input, then in the current circumstances, the output also may be different.
Date : 2025-06-20 Size : 2kb User : hellen
shuzisuoxiang Downloaded：0: Digital phase-locked loop (DPLL) technology in digital communications, radio electronics, and many other fields has been extremely wide range of applications. With the traditional analog circuit implementation of the PLL
Date : 2025-06-20 Size : 1kb User : hellen
nfenpin Downloaded：0: N divider is a simple addition to N counter. Addition and subtraction of the pulse divider circuit output pulse frequency N again, the whole loop of the output signal Fout.
Date : 2025-06-20 Size : 1kb User : hellen
niguan Downloaded：0: fsk modulation demodulation
Date : 2025-06-20 Size : 51kb User : niguan
counter Downloaded：0: Implementation of arbitrary even-numbered odd-numbered frequency sub-module
Date : 2025-06-20 Size : 1kb User : lee gilbert
VHDL312vh6 Downloaded：0: VHDL contains a number of small example, there is traffic lights, Electronic organ, simple stopwatch, and so on, traffic lights have been tested, according to their own needs, slightly altered, very good use!
Date : 2025-06-20 Size : 320kb User : lee gilbert
gray2 Downloaded：0: Enter a number of implementation, resulting in the median of all the Gray code
Date : 2025-06-20 Size : 5kb User : 叶
qiangdaqi Downloaded：1: Answer using Verilog prepared, and when the host announced the " start game" , the system initialization, players enter the " Answer status." When a player first of all, press the Answer the switch, the c
Date : 2025-06-20 Size : 1.05mb User : 叶
Antishakeswitchprocedure Downloaded：0: This is a very good anti-shake VHDL procedures, with detailed explanations, can be used as the use of commonly used subroutines Favorites
Date : 2025-06-20 Size : 1kb User : liaoyintang
tongxu Downloaded：0: VHDL communication program
Date : 2025-06-20 Size : 2kb User : 谢谢

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