VHDL-FPGA-Verilog List Page 3471

VHDL-FPGA-Verilog list

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dianyabiao Downloaded：0: ISD4004 voice-based value of AC and DC voltage at the design table: In this paper, based on the voice chip ISD4004 voice at the value of AC-DC voltage meter design. Part by the data acquisition circuit, A/D conversion of
Date : 2025-07-22 Size : 464kb User : song
yuyincaiji Downloaded：0: Speech acquisition and playback system source code: 1. In order to make pronunciation longer data storage, faster, 256K* 16Bit selected the SRAM 2. In order to reduce the complexity of single-chip control, the use of the
Date : 2025-07-22 Size : 786kb User : song
FSK_work Downloaded：0: MY FSK,have cost much time。please use it carefully。
Date : 2025-07-22 Size : 697kb User : 朱铭进
LogicAnalysisOneMod Downloaded：0: Proposed logic analyzer output driver, quartus II compiler is passed, the Verilog HDL containing TLC7528 driver, download the test
Date : 2025-07-22 Size : 886kb User : huyanchao
aesencryption Downloaded：0: Aes encryption on Fpga
Date : 2025-07-22 Size : 4kb User : Ibrahim
IMG Downloaded：0: This is a VHDL prepared VGA driver can display color
Date : 2025-07-22 Size : 1kb User : hanbin
distributivealgorithm Downloaded：0: this files having verilog distributive arithmetic operations
Date : 2025-07-22 Size : 2kb User : Ibrahim
UART2_vhdl Downloaded：0: This is the VHDL language serial uart driver feel it is very difficult but this can be written by transplantation is better huh
Date : 2025-07-22 Size : 3kb User : hanbin
freedev_ps2 Downloaded：0: Free electrons from the site to download a ps2 mouse driver, so I have been verified, you can use and better
Date : 2025-07-22 Size : 776kb User : JackChen
uart_Transmitter Downloaded：0: To write a uart driver code, is a project file, suitable for beginners, which the wording of the state machine is worth learning
Date : 2025-07-22 Size : 334kb User : JackChen
52RD_com.files Downloaded：0: This is a very good introductory information for beginners, which mainly stresses the vhdl and verilog grammar can be integrated for learning groups
Date : 2025-07-22 Size : 18kb User : JackChen
serial_xiangguan Downloaded：0: Verilog prepared with detection of a related project, more detailed comments, which the algorithm may be understood to a certain degree of difficulty
Date : 2025-07-22 Size : 29kb User : JackChen

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