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VHDL-FPGA-Verilog list
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half_adder
Downloaded:0
half adder with testbench
Date
: 2025-11-16
Size
: 1kb
User
:
Junaid
PRO_AMP_paper
Downloaded:0
PROTEL2004,AMPLIFIER
Date
: 2025-11-16
Size
: 14kb
User
:
yuzhen
PWMforvoltageregulator
Downloaded:0
pulse width modulation controlled for 8-bit antrada give us a total of 255 possibilities. The continuous signal output will therefore be a value between the maximum and minimum voltage of the plate where you download the
Date
: 2025-11-16
Size
: 1kb
User
:
defghia
uart16750
Downloaded:0
UART 16750 source code for VHDL
Date
: 2025-11-16
Size
: 148kb
User
:
maxshao
DigitalSignalGenerator
Downloaded:0
Digital Signal Generator
Date
: 2025-11-16
Size
: 77kb
User
:
smile
Xilinx_Altera_FPGAs
Downloaded:0
Xilinx 和 Altera FPGAs power management solutions
Date
: 2025-11-16
Size
: 698kb
User
:
hwd
VHDL
Downloaded:0
By learning this file ,you can know some basic grammer of VHDL and coding some simple program
Date
: 2025-11-16
Size
: 2.29mb
User
:
马超琼
verilogPPT
Downloaded:0
Book for the Department of Microelectronics, Peking University Verilog courseware for advanced users, the content is complete, the Internet is difficult to find the Oh!
Date
: 2025-11-16
Size
: 1.42mb
User
:
滴滴
Verilog
Downloaded:0
All verilog source code counter, adder, serial quick.
Date
: 2025-11-16
Size
: 21kb
User
:
王腾
10scounter
Downloaded:0
10 seconds counter of the source code for VHDL simulation process
Date
: 2025-11-16
Size
: 1kb
User
:
王腾
GrayCode
Downloaded:0
Gray Code, Gray Code,, is an absolute encoding, the typical Gray code is a kind of reflection characteristics and cycle characteristics of the single-step self-complement, and its circulation, single-step feature elimina
Date
: 2025-11-16
Size
: 60kb
User
:
王腾
counter
Downloaded:0
FPGA implementation of several counter verilog source code
Date
: 2025-11-16
Size
: 2kb
User
:
王腾
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.77
.78
.79
.80
.81
3082
.83
.84
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.86
.87
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4310
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