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VHDL-FPGA-Verilog list
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Using VHDL language is a state machine source code of traffic lights, in three ways.
Date : 2025-11-17 Size : 5kb User : bianwei

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This is my notes when learning VHDL language, the content is very detailed and EDA technologies for the beginner who is a good reference in terms of knowledge. These include simple programming and more complex programmin
Date : 2025-11-17 Size : 123kb User : bianweiy

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This compressed file is 51 and Altera_Cyclone fpga serial communication program, available through the actual test hardware.
Date : 2025-11-17 Size : 2kb User : 肖康

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NIOSII read through the IP core in CMOS image sensor data in SDRAM
Date : 2025-11-17 Size : 1kb User : 尹长生

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Using Verilog language production of 17 Road PWM signal to control 17 Servos, can be used as IP core to the AVALON bus, in the nios IDE in control with the C language.
Date : 2025-11-17 Size : 3kb User : 尹长生

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use verilog write the state machine which is used to meke the A/D chip working!
Date : 2025-11-17 Size : 1kb User : zhang

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the program use to drive AD9851 which wirte with verilog!
Date : 2025-11-17 Size : 1kb User : zhang

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the program write by verilong which use to scan the switch and return inturrupt in fpga.
Date : 2025-11-17 Size : 1kb User : zhang

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Assume that the system clock to 50MHz, the design of an electronic stopwatch test circuit, so the step by 0.01s to time. The electronic stopwatch with asynchronous clear and start/stop counting, the largest of Total to 5
Date : 2025-11-17 Size : 518kb User : 邓云鹏

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Automatic washing machine control principle according to design a control circuit, to enable automatic control of washing machines to complete soaking, washing, rinsing, dehydration (drying) and so the entire work proces
Date : 2025-11-17 Size : 506kb User : 邓云鹏

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Prepared using verilog HDL simple LCD control circuit that can display simple characters.
Date : 2025-11-17 Size : 2.12mb User : 邓云鹏

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I2C-Master Core
Date : 2025-11-17 Size : 3.11mb User : summerooooo
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