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VHDL-FPGA-Verilog list
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ps2
Downloaded:0
Transmission of the overall framework. Tsinghua University s pilot project. Get state funds to support 863 projects
Date
: 2025-11-19
Size
: 24kb
User
:
柳承化
bcd7
Downloaded:0
BCD
Date
: 2025-11-19
Size
: 270kb
User
:
Renlonghao
RS_Verilog
Downloaded:0
there is a verilogHDL about RS decoder.
Date
: 2025-11-19
Size
: 99kb
User
:
maechel
FIR
Downloaded:0
FIR filter implementation using Verilog language design was carried out
Date
: 2025-11-19
Size
: 3.94mb
User
:
翁萍
FSK
Downloaded:0
FSK encoder to achieve routine VHDL language
Date
: 2025-11-19
Size
: 262kb
User
:
Ivan_s
UART
Downloaded:0
uart serial interface routines VHDL language
Date
: 2025-11-19
Size
: 7kb
User
:
Ivan_s
CMI
Downloaded:0
Implementation of CMI encoder vhdl language
Date
: 2025-11-19
Size
: 219kb
User
:
Ivan_s
VGA
Downloaded:0
VGA color bar generator, VHDL language to achieve
Date
: 2025-11-19
Size
: 2kb
User
:
Ivan_s
PS2keyboard
Downloaded:0
PS2 keyboard port scanning circuit realization of VHDL language
Date
: 2025-11-19
Size
: 517kb
User
:
Ivan_s
LCD
Downloaded:0
VHDL fpga
Date
: 2025-11-19
Size
: 6.82mb
User
:
尧
lunwen
Downloaded:0
Introduction and simple protocol spi spi interface description of the SPI CoolRunner CPLD-based design structure
Date
: 2025-11-19
Size
: 81kb
User
:
yangshisong
LCD12864VHDL
Downloaded:0
Verilog LCD12864
Date
: 2025-11-19
Size
: 693kb
User
:
尧
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.64
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.72
.73
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4310
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