VHDL-FPGA-Verilog List Page 2956

VHDL-FPGA-Verilog list

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shizhong Downloaded：0: Show hours- minutes- seconds, the whole point of time, hours and minutes and other basic features adjustable
Date : 2025-11-19 Size : 305kb User : hanyanfeng
1111clock Downloaded：0: Multi-clock, main display hours, minutes, seconds. Date and time correction.
Date : 2025-11-19 Size : 228kb User : hanyanfeng
1602LCD Downloaded：0: The program is 1602' s verilog program, the program prepared by the state machine
Date : 2025-11-19 Size : 228kb User : xierui
BusBroadCast Downloaded：0: Bus stop announcement system, to stop, LED display board with SPR module, application profile instructions, source code
Date : 2025-11-19 Size : 11.79mb User : zack
The_veriloghdl_golden_reference_guides Downloaded：0: verilog HDL Golden guid
Date : 2025-11-19 Size : 272kb User : 王凯
VHDL Downloaded：0: 4-bit divider divider can be programmed instructive
Date : 2025-11-19 Size : 50kb User : guoyishi
I2C Downloaded：0: I2S interface in VHDL
Date : 2025-11-19 Size : 842kb User : Markus_Withfather
add_gen Downloaded：0: Address generator, the adoption of 16* 15 matrix, line input, line output
Date : 2025-11-19 Size : 749kb User : 李嘉仪
7segment Downloaded：0: it is 7 segement code
Date : 2025-11-19 Size : 287kb User : naveen
XILINX-spartan-3e(ds312) Downloaded：0: xilinx Handbook which joined the period of their understanding for beginners
Date : 2025-11-19 Size : 2.56mb User : 李明
ASIC_PMSM Downloaded：0: The FOC to PMSM use ASIC.
Date : 2025-11-19 Size : 8.89mb User : 李全武
synplify_for_xilinx Downloaded：0: Information in English, integrated tools synplify on xilinx support. Good progress in English
Date : 2025-11-19 Size : 223kb User : 李明

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