VHDL-FPGA-Verilog List Page 2844

VHDL-FPGA-Verilog list

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zhuti2 Downloaded：0: U.S. xilinux company training course in 2009, that part of the second part
Date : 2025-11-20 Size : 3.18mb User : gupingping
zhuti3 Downloaded：0: U.S. xilinux company training course in 2009, that part of the third part of the
Date : 2025-11-20 Size : 2.42mb User : gupingping
Guidelines_for_Designing_High-Speed_FPGA_PCBs Downloaded：0: Guidelines for Designing High-Speed FPGA PCBs
Date : 2025-11-20 Size : 1.58mb User : lelei
DLL Downloaded：0: DLL
Date : 2025-11-20 Size : 280kb User : 孔令军
FPGA-Training_Performance_Time_Memory Downloaded：0: FPGA Training: Performance+ Time = Memory. FPGA system design capabilities to improve well documented, the authors propose the concept of smart serial to achieve objectives, cost savings, it is worth learning.
Date : 2025-11-20 Size : 300kb User : william wei
mealy_machine Downloaded：0: mealy_machine the code sequence when the input signal pulse detector circuit 110 output is 1 0 otherwise
Date : 2025-11-20 Size : 297kb User : bianyuan
verilog_cordic.tar Downloaded：0: Algorithm to achieve cordic with verilog. Multi-mode, there vecter and rotate mode. Support for multiple output
Date : 2025-11-20 Size : 353kb User : Fengxiaodong
eth_send Downloaded：0: Tsinghua University sdr project, network interface code. Verilog preparation. Very practical. Hope you like it.
Date : 2025-11-20 Size : 4kb User : 柳承化
EWBtutorial Downloaded：0: EWB electronic circuit simulation software, user manual, describes the basic operation and circuit simulation software.
Date : 2025-11-20 Size : 7.5mb User : 水牛EDA
parafac Downloaded：1: matlab parafac matrix decomposition algorithm for multi-dimensional simulation
Date : 2025-11-20 Size : 96kb User : hh
hongsejufengII Downloaded：0: Altera，FPGA
Date : 2025-11-20 Size : 1.1mb User : lulu
cangyongEDAgjzn Downloaded：0: EDA
Date : 2025-11-20 Size : 1.37mb User : lulu

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