VHDL-FPGA-Verilog List Page 2802

VHDL-FPGA-Verilog list

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cun Downloaded：0: Through the fpga to store data on the bus to read and write spi
Date : 2025-11-21 Size : 779kb User : 张楚荀
djdplj Downloaded：0: The use of other precision measuring principle in combination with single chip technology to design a digital frequency meter, shielded from the dry drive circuit and the use of digital technical measures such as mean fi
Date : 2025-11-21 Size : 242kb User : ldd
VHDL-djdplj Downloaded：0: VHDL language based on the decimal precision frequency meter, etc. The design, using VHDL language, the use of top-down design, the system is divided by function layer hierarchical design method, the use of Quartus8.0 de
Date : 2025-11-21 Size : 223kb User : ldd
Crack_QII10.0_x86 Downloaded：0: Crack Alter Quartus 10.0
Date : 2025-11-21 Size : 13kb User : Giang
clock Downloaded：0: Real simply clock on verilog
Date : 2025-11-21 Size : 216kb User : Andrejo
Simply3verilogexample Downloaded：0: Sympli 3 verilog example
Date : 2025-11-21 Size : 2kb User : Andrejo
Bibus Downloaded：0: bibus verilog example
Date : 2025-11-21 Size : 79kb User : Andrejo
vme_sv Downloaded：0: voice modulation engine, a DSP processor with test bench written in SystemVerilog
Date : 2025-11-21 Size : 8kb User : jijo
5 Downloaded：0: FPGA-based VHDL design digital stopwatch, paper, a major program
Date : 2025-11-21 Size : 1kb User : 孤星寒
sellor Downloaded：0: Digital system design, VHDL programming language features to complete the ticket
Date : 2025-11-21 Size : 2kb User : 陈恒磊
verilog Downloaded：0: The realization of some of the basic devices, including the selection, counters, shift registers, a number of registers and a variety of test modules
Date : 2025-11-21 Size : 3kb User : 李辉
verilogexample Downloaded：0: Which contains the verilog description of various types of devices and the specific implementation method
Date : 2025-11-21 Size : 117kb User : 李辉

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