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VHDL-FPGA-Verilog list
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The Verilog hardware description language (HDL) provides the ability to describe digital and analog systems. This ability spans the range from descriptions that express conceptual and architectural design to detailed des
Date : 2025-11-23 Size : 5.15mb User : rik

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Simple implementation of classic DES unix crypt()
Date : 2025-11-23 Size : 3kb User : thefre

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Using SOPC implementation of the code features a revolving door in QUARTUS9.0, NIOSII9.0 development environment.
Date : 2025-11-23 Size : 11.46mb User : fd

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Using SOPC control break in QUATUSII, 9.0NIOSII9.0 development environment
Date : 2025-11-23 Size : 11.57mb User : fd

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Subway auto ticketing system based on QuartusII
Date : 2025-11-23 Size : 17kb User : 周虹旭

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For vga display, and image rotation, this program can be used as part of the VGA interface and graphics on this basis, awakened in the FPGA, storage, display and rotate.
Date : 2025-11-23 Size : 2.04mb User : 寇福东

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Produce a single pulse
Date : 2025-11-23 Size : 10kb User : sujian

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Rate is 1000kb/s, 8-bit word length, frame length is 128 words, frame synchronization of PCM code EB90H editorial control
Date : 2025-11-23 Size : 2.41mb User : qifo

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DS18B20 temperature sensor, with the verilog language
Date : 2025-11-23 Size : 2kb User : qifo

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ds18b20 temperature sensor, achieved using vhdl
Date : 2025-11-23 Size : 1.3mb User : qifo

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Nios soft core CPU based on the design and implementation, quartusII
Date : 2025-11-23 Size : 8kb User : qifo

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m sequence
Date : 2025-11-23 Size : 292kb User : daisy
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