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VHDL-FPGA-Verilog list
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quartus environment using the schematic approach of DDS graphic tutorial, the main control schematic, quartus simulation
Date : 2025-11-24 Size : 504kb User : ranshaoqiang

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The use of three-state machine, for those who want to learn verilog and VHDL programming is a must-see content people
Date : 2025-11-24 Size : 260kb User : ranshaoqiang

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quartus development and debugging tool to use signaltap
Date : 2025-11-24 Size : 226kb User : ranshaoqiang

design of the FPGA signal procession model based on MATLAB
Date : 2025-11-24 Size : 618kb User : maomao

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Led the design of on-chip programmable function properly after I test
Date : 2025-11-24 Size : 1.35mb User : shawn43

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The source code for the flash experiments led by my test function was normal
Date : 2025-11-24 Size : 947kb User : shawn43

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Frequency counter with a single-chip interface through my test function was normal
Date : 2025-11-24 Size : 658kb User : shawn43

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ad5510' s use of the controller
Date : 2025-11-24 Size : 189kb User : shawn43

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The code for the VHDL implementation of the 51 IP core
Date : 2025-11-24 Size : 4.58mb User : shawn43

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The code for the frequency and phase I testing by the tester function of the normal
Date : 2025-11-24 Size : 302kb User : shawn43

FPGA-based digital oscilloscope of the overall design and implementation of various programs, such as intensive use of the frequency measurement, data collection and many other technical analysis
Date : 2025-11-24 Size : 2.34mb User : 杨前

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This article is based on the 2009 state title game digital oscilloscope analysis of the subject and the overall implementation of the method is, of great use value
Date : 2025-11-24 Size : 985kb User : 杨前
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