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VHDL-FPGA-Verilog list
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TI' s DM6467 development board CPLD source
Date : 2025-11-23 Size : 444kb User : 压力

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UART_TO_PC 51MCU C language
Date : 2025-11-23 Size : 13kb User : 李国军

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arm7 code
Date : 2025-11-23 Size : 448kb User : zhangwei

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Panel light control, and brightness adjustment with color temperature, plus 1 with 2-channel PWM analog dimming, brightness dimming by PWM conversion circuits convert analog analog dimming on the increase.
Date : 2025-11-23 Size : 2kb User : kiuyzgt

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rtl8019 Ethernet communication, and by the control FPGA
Date : 2025-11-23 Size : 23.41mb User : 杨康乐

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In FPGA_MarkIII_2C8_2 based on the interface is enabled on the basis of doing testing, inspection specified BlockNo block is good or bad.
Date : 2025-11-23 Size : 6kb User :

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Data conversion, data format into the 32-bit 16-bit data format
Date : 2025-11-23 Size : 80kb User : 杨康乐

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Data conversion, data format to convert 16 to 32-bit data format
Date : 2025-11-23 Size : 8.3mb User : 杨康乐

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FPGA control 68013 for data transfer, the use of passive transmission
Date : 2025-11-23 Size : 661kb User : 杨康乐

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0-99 stopwatch digital display, a stop-start function
Date : 2025-11-23 Size : 1kb User : duzhenhua

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Vies to answer first the program
Date : 2025-11-23 Size : 141kb User : Ming Sheng

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FPGA pen interview questions, several large companies to provide written record of interview
Date : 2025-11-23 Size : 13kb User : guoyonggang
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