VHDL-FPGA-Verilog List Page 2022

VHDL-FPGA-Verilog list

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r232 Downloaded：0: Under verilog fpga serial port, baud rate 115200, and PC communication
Date : 2025-11-23 Size : 7kb User : 刘欣
Four-binary-adder Downloaded：0: Four binary adder
Date : 2025-11-23 Size : 1kb User : denwei0011
1212 Downloaded：0: Adder composed of eight logical way to sequence the eight multiplier design
Date : 2025-11-23 Size : 1kb User : denwei0011
VHDL-language Downloaded：0: VHDL language to complete 4-bit latch, the measured frequency controller design
Date : 2025-11-23 Size : 1kb User : denwei0011
Analog-to-digital-converter Downloaded：0: Analog to digital converter, 64-bit double-precision analog inputs, 16 digital outputs
Date : 2025-11-23 Size : 1kb User : chenxuying
duble-process-lock Downloaded：0: The process of writing composed by two main control functions with the same symbol of Moore-type finite state machine
Date : 2025-11-23 Size : 1kb User : denwei0011
State-machine-programming Downloaded：0: State machine programming experiment content 1. Gray coding and encoding two One-hot state machine 2 trigger part and the combinational logic part of the combination of two states with separate machines.
Date : 2025-11-23 Size : 170kb User : 张云
MousePS_2 Downloaded：0: Implements a PS-2 interface, mouse interface initialization, and X, Y coordinates as well as key information about the reading
Date : 2025-11-23 Size : 2.17mb User : 张翰天
4_4jianpan Downloaded：0: Realize 4* 4 keyboard scan the source program, can press the corresponding case control the corresponding LED lamp.
Date : 2025-11-23 Size : 418kb User : xiaoyuhan
LCD Downloaded：0: It is source code of Timer used LCD module
Date : 2025-11-23 Size : 2kb User : Spizero
Cordic Downloaded：0: Cordic algorithm in VHDL
Date : 2025-11-23 Size : 1kb User : Spizero
VGA Downloaded：0: VGA basic source code. Have fun :)
Date : 2025-11-23 Size : 1kb User : Spizero

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