VHDL-FPGA-Verilog List Page 182

VHDL-FPGA-Verilog list

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odd_even_check Downloaded：0: For correcting the correctness of the data. Specifically, at the transmitting end, the valid data bits and the parity bits are added to the data check code by adding the parity bit. At the receiving end, the data is judg
Date : 2025-08-18 Size : 1kb User : digital_wang
AD9883 iic_v1.0_for_sim Downloaded：0: Program used to configure the AD9883 chip register, using the IIC protocol.
Date : 2025-08-18 Size : 4.71mb User : kilyc
original_code_multiplier Downloaded：0: 16-bit original code multiplier with test program
Date : 2025-08-18 Size : 1kb User : digital_wang
unsigned_array_multiplier Downloaded：0: 4X4 bit unsigned array multiplier, can increase the multiplication of the operation speed
Date : 2025-08-18 Size : 1kb User : digital_wang
sequence_detector(6-state) Downloaded：0: The source code of Chapter 15 of the Verilog Digital System Design Tutorial (Xia Yuwen) has been improved from the original 8 state to the 6 state, and the required function can be achieved. For a specific sequence in wh
Date : 2025-08-18 Size : 1kb User : digital_wang
MICROCHIP程序实例-debounce按键消抖 Downloaded：0: Microchip Program instance-debounce button Shake
Date : 2025-08-18 Size : 99kb User : zhanghongshuai
Zircon_Digital Downloaded：0: Choose a road, three people vote, trigger, RS register
Date : 2025-08-18 Size : 25.61mb User : 何名一
uart Downloaded：0: VHDL serial port conversion code
Date : 2025-08-18 Size : 469kb User : 辉耀丿城主
数字系统课程设计 Downloaded：0: Codes in doc. Simulating the tickets sales system of metros. With ISE, in VHDL.
Date : 2025-08-18 Size : 5.05mb User : KevinZZ
cpu Downloaded：0: Simulating the work theory of cpu. By VHDL in ISE.
Date : 2025-08-18 Size : 4.11mb User : KevinZZ
Metro_Tickets_System Downloaded：0: Simulating the tickets selling systems of metros. In VHDL, with ISE.
Date : 2025-08-18 Size : 25kb User : KevinZZ
My_POC Downloaded：0: Simulating the functions of POC. In VHDL, with ISE.
Date : 2025-08-18 Size : 555kb User : KevinZZ

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