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VHDL-FPGA-Verilog list
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2222
Downloaded:0
Prediction algorithm to optimize and in several important modules of the FPGA realizing
Date
: 2025-09-16
Size
: 1.96mb
User
:
张维琛
3333
Downloaded:0
AVS video decoder of a kind of structure design and hardware implementation
Date
: 2025-09-16
Size
: 145kb
User
:
张维琛
11111111
Downloaded:0
Used for high speed and high precision clock stable development ADC circuit
Date
: 2025-09-16
Size
: 1.21mb
User
:
张维琛
111111111
Downloaded:1
Based on FPGA high-definition video decoding system control module design
Date
: 2025-09-16
Size
: 3.45mb
User
:
张维琛
stepmoto_pwm_test
Downloaded:0
Megawin single 2 way PWM control of stepper motor, stepper motor subdivision
Date
: 2025-09-16
Size
: 2kb
User
:
lzq
Simply-RISC-S1-Source-code
Downloaded:0
The open-source extensible processor architecture, used to query the source code, very good, it is worth to download
Date
: 2025-09-16
Size
: 1.36mb
User
:
杨金谕
all
Downloaded:0
Based on FPGA-frequency test the Verilog HDL code, test range 1-10MHz, with XILINX ISE software to open.
Date
: 2025-09-16
Size
: 2.35mb
User
:
elink
ADC0809-digital-voltage-meter
Downloaded:0
ADC0809 digital voltage meter.
Date
: 2025-09-16
Size
: 1kb
User
:
林中海
color_vga.tar
Downloaded:0
VGA DIsplay control. which reads pixel data stored in coregen on fpga and displays image on monitor using VGA
Date
: 2025-09-16
Size
: 3.21mb
User
:
Minesh
i2c_1.tar
Downloaded:0
i2c driver for video decoder ad9980 in virtex
Date
: 2025-09-16
Size
: 1.53mb
User
:
Minesh
uartverilog
Downloaded:0
On CPLD routine. The chip is MAXII, in quartusII under development, is a serial routines.
Date
: 2025-09-16
Size
: 312kb
User
:
ren
verilogsram
Downloaded:0
On CPLD routine.Chip for MAXII, in quartusII under development, and is a read routine of the external memory.
Date
: 2025-09-16
Size
: 305kb
User
:
ren
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.63
.64
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.66
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1768
.69
.70
.71
.72
.73
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4310
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