VHDL-FPGA-Verilog List Page 1635

VHDL-FPGA-Verilog list

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aes Downloaded：0: AES is a code encryptioin function after RC5.
Date : 2025-09-14 Size : 3kb User : dodo
C51-Clock-display(LED) Downloaded：0: The program is tested in teaching. can display the hour,minute,second in LED by C51.thank you
Date : 2025-09-14 Size : 1kb User : 张珂
MAX_II_RevC_brd Downloaded：0: Altera CPLD
Date : 2025-09-14 Size : 1.53mb User : 19820521
four_five Downloaded：0: FPGA is good for your study of your verilog langer
Date : 2025-09-14 Size : 228kb User : hushi
prjadd Downloaded：0: vhdl counter code. the code is passed with quartus81
Date : 2025-09-14 Size : 829kb User : 林琳
New-Microsoft-Word-Document Downloaded：0: general code for counter
Date : 2025-09-14 Size : 19kb User : lucifer
Copy-of-New-Microsoft-Word-Document Downloaded：0: pn-random code generator
Date : 2025-09-14 Size : 19kb User : lucifer
Copy-(2)-of-New-Microsoft-Word-Document Downloaded：0: pn random code gerator fast
Date : 2025-09-14 Size : 19kb User : lucifer
vhdllcd Downloaded：0: vhdl lcd
Date : 2025-09-14 Size : 3kb User : 姚璐
shizhong Downloaded：0: VHDL electronic clock (24 hours to make, points seconds) description
Date : 2025-09-14 Size : 1kb User : 李晓宇
afifo Downloaded：0: verilog HDL fifo , verilog HDL fifo ,
Date : 2025-09-14 Size : 2kb User : shaohejiang
VHDLfenpin Downloaded：0: VHDL integer decimal points even odd number not 50 prescaler design
Date : 2025-09-14 Size : 336kb User : 李晓宇

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