VHDL-FPGA-Verilog List Page 1204

VHDL-FPGA-Verilog list

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ddr_sig Downloaded：0: This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and f
Date : 2025-08-22 Size : 2kb User : LJ
ddr_data Downloaded：0: This VHDL or Verilog source code is intended as a design reference // which illustrates how these types of functions can be implemented. // It is the user s responsibility to verify their design for // consistency and f
Date : 2025-08-22 Size : 3kb User : LJ
FPGA Downloaded：0: Mainly fpga learning materials, which contains the fpga design case studies and the main program to explain, is the study and practice of information.
Date : 2025-08-22 Size : 12.01mb User : 薛金龙
dianzi Downloaded：0: Describe the procedures of the keyboard, you can achieve the automatic keyboard player, recording and playing the other modes.
Date : 2025-08-22 Size : 19kb User : 薛金龙
mima Downloaded：0: Electronic password lock function, memory and error alarm function, the password lock function better.
Date : 2025-08-22 Size : 1.09mb User : 薛金龙
soc-recourse Downloaded：0: On-chip supporting system source code of the book source code, this is a book on system design, analysis of the code book
Date : 2025-08-22 Size : 4.54mb User : wanlgu
fpga_ctl Downloaded：0: joint application niosII and VHDL, VHDL prepared a basic framework, C++ to write niosII application
Date : 2025-08-22 Size : 5.71mb User : shiweilei
tail-light Downloaded：0: Vhdl language to complete the simple control of the taillights, brake and turn left, turn right to the function by testing and running successfully.
Date : 2025-08-22 Size : 324kb User : hao dong
soda-vending Downloaded：0: By fsm soda vending machine coin selected basic function, and yet achieve the homing and setting, by testing
Date : 2025-08-22 Size : 137kb User : hao dong
PWM Downloaded：0: PWM function, vhdl language set adjust the duty cycle of 10 -100 , tested by
Date : 2025-08-22 Size : 183kb User : hao dong
4_1mux Downloaded：0: 2-1 mux realized through Vhdl language based on the 2-1 mux 4-1 mux of procedures and test bench preparation, the test is successful
Date : 2025-08-22 Size : 20kb User : hao dong
counter2b Downloaded：0: Based on the vhdl completed four counter function to achieve, and the completion of a 16-bit adder program written based on this program, enclosing testbench, the test is successful.
Date : 2025-08-22 Size : 39kb User : hao dong

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