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Downloaded:2
aes encryption algorithm realize the VHDL code in FPGA chips upward tried
Date : 2008-10-13 Size : 6kb User : stym_001

Downloaded:0
This procedure can be the end of the document in the PE to add a new section, which has been in the encryption process to start running when asked to enter a password.
Date : 2008-10-13 Size : 20.43kb User : 张华

Downloaded:0
3DES the delphi source, their des algorithm on the basis of the 3DES algorithm, tested and absolutely available.
Date : 2008-10-13 Size : 3.8kb User : 谢佳友

Downloaded:0
Playfair will be expressly in the two-letter combinations treated as a unit, and these modules is converted to the two-letter combinations.
Date : 2008-10-13 Size : 4.1kb User : skittles

Downloaded:0
Can use this to file CRC checksum, to ensure the uniqueness of
Date : 2008-10-13 Size : 26.86kb User : 陈毛毛

Downloaded:0
C realize the use of 300 commonly used encryption algorithm, such as rsa, des
Date : 2008-10-13 Size : 507.96kb User : Leo.Lee

Downloaded:0
Parallel Implementation of CRC checksum, Verilog source code .8-bit data input, to achieve fast, applicable with all types of devices.
Date : 2008-10-13 Size : 77.02kb User : 徐亮

Downloaded:0
DES/DES3 with operators of CBC and OFB
Date : 2008-10-13 Size : 7.47kb User : xiaodingdang

Downloaded:0
This is a md5 encryption algorithm, is my under-line, in this and the U.S. share
Date : 2008-10-13 Size : 1016byte User : 张恒

Downloaded:0
For 10M, 100M, 1000M Ethernet parallel CRC algorithm, the CRC algorithm is different from the ordinary. Verilog Description
Date : 2008-10-13 Size : 1.43kb User : winwalk

Downloaded:0
Dongle detection tool, can remove the dog. For use VFP particularly appropriate to do the procedure.
Date : 2008-10-13 Size : 4.94kb User : guobaolin

Downloaded:2
Using java to write the RSA encryption and decryption procedures, support for digital signature verification and sub-encryption, has a friendly graphical interface.
Date : 2008-10-13 Size : 4.91kb User : 羊毛
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