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Cy7C68013_SLAVE-FIFO_Verilog Downloaded：0: For CY7C68013 in the SLAVE FIFO mode to read and write Verilog source code
Date : 2025-11-14 Size : 1.14mb User : 王大锤
traffic_light Downloaded：0: Based on the Keil4 software platform development, simulation of crossroads traffic lights on and off procedures.
Date : 2025-11-14 Size : 43kb User : weisheng
DeepLearning Downloaded：0: DeepLearning is a popular in the area of th AI,this code is based on the matlab platform
Date : 2025-11-14 Size : 3kb User : 李洋
ch452 Downloaded：0: Mainly for matrix keyboard control chip CH452 single-chip source code
Date : 2025-11-14 Size : 2kb User : 王大锤
DS1302-clock Downloaded：0: Based on the Keil4 software platform development of the C language program, using 51 single-chip as the master MCU.
Date : 2025-11-14 Size : 46kb User : weisheng
Java-basedproject Downloaded：0: Java project source code
Date : 2025-11-14 Size : 3.77mb User : 李洋
PDSJKL Downloaded：0: Source is on the judge source, its function is good
Date : 2025-11-14 Size : 1kb User : rtygb778
monixinhao Downloaded：0: Analog signal on the impact of matlab and other small procedures, the program is easy to understand, especially for beginners, not to be missed, worth having
Date : 2025-11-14 Size : 1kb User : 刘晨
CY7C68013A_56PIN_SLAVE-FIFO_Firmware Downloaded：0: CY7C58013A in SLAVE_FIFO mode firmware configuration program to achieve High Speed bulk transfer
Date : 2025-11-14 Size : 137kb User : 王大锤
FPGA-for-UART-source-code Downloaded：0: Verilog source code for UART interface communication FPGA, including serial read and serial write module
Date : 2025-11-14 Size : 169kb User : 王大锤
RingBuffer Downloaded：0: Ringbuffer, Be used for the connector between serial port communication peripherals and Background processing services.
Date : 2025-11-14 Size : 1kb User : 杨松涛
uart Downloaded：0: uart test code, you can test sending and receiving, with the compiled executable file, android compiled under Android.mk file
Date : 2025-11-14 Size : 9kb User : 乘风

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