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[Other resource] 7SegClock_HLD3

Description: 基于fpga和xinlinx ise 的7段码led显示程序，希望对你有所帮助-and ideally xinlinx 7 of the code led display program, and I hope to help you
Platform: | Size: 238528 | Author: 王萌 | Hits:

[Other resource] Game_HLD3

Description: 基于fpga和xinlinx ise的小游戏的vhdl程序，希望对你有所帮助！-xinlinx and they simply based on the small game and ideally the VHDL process, and I hope to help you!
Platform: | Size: 986916 | Author: 王萌 | Hits:

[Other resource] Max232ForHLD3(20040913)(OK)

Description: 基于fpga和xinlinx ise的串行通信vhdl程序，希望对你有所帮助！-xinlinx and ideally serial communications VHDL process, and I hope to help you!
Platform: | Size: 463858 | Author: 王萌 | Hits:

[Other resource] Mouse_HLD3

Description: 基于fpga和xinlinx ise的鼠标应用vhdl程序，希望对你有所帮助！-and they simply based on the mouse xinlinx ideally VHDL application procedures, and I hope to help you!
Platform: | Size: 577638 | Author: 王萌 | Hits:

[Other resource] Music_HLD3

Description: 基于fpga和xinlinx ise的音乐播放器vhdl程序，希望对你有所帮助！-and xinlinx ideally music player VHDL process, and I hope to help you!
Platform: | Size: 609286 | Author: 王萌 | Hits:

[Other resource] usbsample

Description: 基于fpga和xinlinx ise的usb端口vhdl程序，希望对你有所帮助！-VHDL program for USB port based fpga and xinlinx ise, wish help for you!
Platform: | Size: 983093 | Author: 王萌 | Hits:

[Other resource] mdct.tar

Description: 这是06年4月刚刚完成的程序，从opencore.org下载而来。用vhdl语言描写，以及matlab仿真，testbench，以及在xinlinx上的综合。 The MDCT core is two dimensional discrete cosine transform implementation designed for use in compression systems like JPEG. Architecture is based on parallel distributed arithmetic with butterfly computation. -This is April 06 had just completed the process, from opencore.org downloaded from. Vhdl description language used, and Matlab simulation, testbench, and the Comprehensive xinlinx. The MDCT core is two dimensional discrete cosin e transform implementation designed for use in JPEG compression systems like. Architecture i 's based on parallel distributed arithmetic wit h butterfly computation.
Platform: | Size: 1767014 | Author: 陈朋 | Hits:

[Other resource] fft1024ref_v1_0

Description: Xinlinx ，1024点高质量的fft实现 ，包含说明文件。-Xinlinx, 1024 points fft achieve high quality, contains documentation.
Platform: | Size: 435615 | Author: 星星 | Hits:

[Other resource] XAPP678c

Description: xinlinx s vhdl code model and user guider-xinlinx's vhdl code model and the guiding user
Platform: | Size: 307799 | Author: lee | Hits:

[Other resource] uart_verilog

Description: 简化的串口通信，去掉了奇偶校验位，波特率为9600，测试通过，fpga型号为xinlinx vp20
Platform: | Size: 5166 | Author: 刘红亮 | Hits:

[Crack Hack] des

Description: 基于 xinlinx 写的DES加密算法，内涵test bench，加密解密都有
Platform: | Size: 23834 | Author: 徐磊 | Hits:

[Other resource] e

Description: Xinlinx 公司ISE8.2i使用手册
Platform: | Size: 1867126 | Author: 东平 | Hits:

[Communication] Xinlinx的UART参考设计

Description: Xinlinx的UART参考设计-Xinlinx UART reference design
Platform: | Size: 31019 | Author: 陈平 | Hits:

[Program doc] Xinlinx的UART参考设计

Description: Xinlinx的UART参考设计-Xinlinx UART reference design
Platform: | Size: 30720 | Author: 陈平 | Hits:

[VHDL-FPGA-Verilog] Game_HLD3

Description: 基于fpga和xinlinx ise的小游戏的vhdl程序，希望对你有所帮助！-xinlinx and they simply based on the small game and ideally the VHDL process, and I hope to help you!
Platform: | Size: 987136 | Author: 王萌 | Hits:

[Software Engineering] e

Description: Xinlinx 公司ISE8.2i使用手册-Xinlinx company ISE8.2i user manual
Platform: | Size: 1866752 | Author: 东平 | Hits:

[Embeded-SCM Develop] 2sp3ekit

Description: XINLINX公司开发板的嵌入式源代码，其中包括了基本的实验内容，系统大建，软件编写-Company XINLINX development board for embedded source code, including the basic content of the experiment, the system Dajian, software development,
Platform: | Size: 58727424 | Author: liyajun | Hits:

[VHDL-FPGA-Verilog] xilinxPROM

Description: xinlinx配置手册，希望对大家有用-xinlinx manual configuration, in the hope that useful
Platform: | Size: 590848 | Author: ms | Hits:

[VHDL-FPGA-Verilog] music

Description: 设计并调试好一个能产生”梁祝”曲子的音乐发生器，并用EDA实验开发系统（拟采用的实验芯片的型号可选Altera的MAX7000系列的 EPM7128 CPLD ，FLEX10K系列的EPF10K10LC84-3 FPGA， ACEX1K系列的 EP1K30 FPGA，Xinlinx 的XC9500系列的XC95108 CPLD，Lattice的ispLSI1000系列的1032E CPLD）进行硬件验证。 设计思路 根据系统提供的时钟源引入一个12MHZ时钟的基准频率，对其进行各种分频系数的分频，产生符合某一音乐的频率，然后再引入4HZ的时钟为音乐的节拍控制，最后通过扬声器放出来。 -Design and debug a good one can produce The Butterfly Lovers piece of music generator, and the development of EDA experimental system (to be used in models of experimental chip with optional Altera s MAX7000 series EPM7128 CPLD, FLEX10K series EPF10K10LC84-3 FPGA, ACEX1K Series The EP1K30 FPGA, Xinlinx the XC9500 series XC95108 CPLD, Lattice s ispLSI1000 series 1032E CPLD) for hardware verification. Design according to the system clock source provided by the introduction of a benchmark 12Mhz clock frequency and its various sub-sub-band frequency coefficients, resulting in consistent with the frequency of a particular music, and then the introduction of 4Hz clock control for the music beats, and finally through Loudspeakers released.
Platform: | Size: 8192 | Author: lijq | Hits:

[Other] fpga_vhdl_src

Description: fpga code xinlinx xxxx
Platform: | Size: 111616 | Author: venessamiki | Hits:
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